R0dn3yS/android_kernel_xiaomi_sm7250
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge "msm: pcie: make PCIe DRV L1ss timeout configurable in devicetree"

Browse Source
This commit is contained in:
qctecmdr 2019-09-12 15:41:03 -07:00 committed by Gerrit - the friendly Code Review server
commit 283b080238
1 changed files with 11 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/pci/controller/pci-msm.c
View File

@ -5936,12 +5936,22 @@ static int msm_pcie_setup_drv(struct msm_pcie_dev_t *pcie_dev,
struct msm_pcie_drv_msg *msg;
struct msm_pcie_drv_tre *pkt;
struct msm_pcie_drv_header *hdr;
u32 drv_l1ss_timeout_us = 0;
int ret;
drv_info = devm_kzalloc(&pcie_dev->pdev->dev, sizeof(*drv_info),
GFP_KERNEL);
if (!drv_info)
return -ENOMEM;
ret = of_property_read_u32(of_node, "qcom,drv-l1ss-timeout-us",
&drv_l1ss_timeout_us);
if (ret)
drv_l1ss_timeout_us = L1SS_TIMEOUT_US;
PCIE_DBG(pcie_dev, "PCIe: RC%d: DRV L1ss timeout: %dus\n",
pcie_dev->rc_idx, drv_l1ss_timeout_us);
drv_info->dev_id = pcie_dev->rc_idx;
/* cache frequent command for communication */
@ -5956,7 +5966,7 @@ static int msm_pcie_setup_drv(struct msm_pcie_dev_t *pcie_dev,
pkt->dword[0] = MSM_PCIE_DRV_CMD_ENABLE;
pkt->dword[1] = hdr->dev_id;
pkt->dword[2] = L1SS_TIMEOUT_US / 1000;
pkt->dword[2] = drv_l1ss_timeout_us / 1000;
msg = &drv_info->drv_disable;
pkt = &msg->pkt;