d0760b3bc8
The Atmel AT91SAM9263 processor includes many more integrated
peripherals than Atmel's previous ARM9-based AT91 processors, so this
has necessitated a few changes to the core AT91 support.
These changes are:
* The system peripheral I/O region we remap has increased from
0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF.
* The increased I/O region forces changes to entry-macro.S and
debug-macro.S due to ARM's limited immediate offset addressing
modes.
* Maximum number of GPIO banks increases to 5.
* 2 MMC controllers so the board-setup code needs to specify which
controller it wishes to use when calling at91_add_device_mmc().
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
27 lines
971 B
ArmAsm
27 lines
971 B
ArmAsm
/*
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* include/asm-arm/arch-at91/entry-macro.S
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*
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* Copyright (C) 2003-2005 SAN People
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*
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* Low-level IRQ helper macros for AT91RM9200 platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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#include <asm/arch/at91_aic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral
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ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
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ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number
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teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
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streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now.
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.endm
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