android_kernel_xiaomi_sm7250/arch/riscv/mm
Vincent Chen bb925b9bec RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap
[ Upstream commit 827a438156e4c423b6875a092e272933952a2910 ]

For 32bit, the upper 32-bit of phys_addr_t will be flushed to zero
after AND with PAGE_MASK because the data type of PAGE_MASK is
unsigned long. To fix this problem, the page alignment is done by
subtracting the page offset instead of AND with PAGE_MASK.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-01 09:16:53 +01:00
..
cacheflush.c RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
extable.c
fault.c riscv: mm: synchronize MMU after pte change 2019-06-25 11:36:00 +08:00
init.c riscv: fixup max_low_pfn with PFN_DOWN. 2019-03-13 14:02:27 -07:00
ioremap.c RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap 2019-12-01 09:16:53 +01:00
Makefile RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00