Jonathan Bakker 82d16c2351 phy: samsung: s5pv210-usb2: Add delay after reset ... [ Upstream commit 05942b8c36c7eb5d3fc5e375d4b0d0c49562e85d ] The USB phy takes some time to reset, so make sure we give it to it. The delay length was taken from the 4x12 phy driver. This manifested in issues with the DWC2 driver since commit fe369e1826 ("usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic.") where the endianness check would read the DWC ID as 0 due to the phy still resetting, resulting in the wrong endian mode being chosen. Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/BN6PR04MB06605D52502816E500683553A3D10@BN6PR04MB0660.namprd04.prod.outlook.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2020-10-01 13:14:44 +02:00
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allwinner
amlogic
broadcom
hisilicon
lantiq
marvell
mediatek
motorola
qualcomm	phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init	2020-09-17 13:45:30 +02:00
ralink
renesas
rockchip
samsung	phy: samsung: s5pv210-usb2: Add delay after reset	2020-10-01 13:14:44 +02:00
st
tegra
ti
Kconfig
Makefile
phy-core.c
phy-lpc18xx-usb-otg.c
phy-pistachio-usb.c
phy-xgene.c