b8d8b883e6
This patch is required to support cpu removal for IPF systems. Existing code just fakes the real offline by keeping it run the idle thread, and polling for the bit to re-appear in the cpu_state to get out of the idle loop. For the cpu-offline to work correctly, we need to pass control of this CPU back to SAL so it can continue in the boot-rendez mode. This gives the SAL control to not pick this cpu as the monarch processor for global MCA events, and addition does not wait for this cpu to checkin with SAL for global MCA events as well. The handoff is implemented as documented in SAL specification section 3.2.5.1 "OS_BOOT_RENDEZ to SAL return State" Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
712 lines
16 KiB
C
712 lines
16 KiB
C
/*
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* SMP boot-related support
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
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* 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
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* 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
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* smp_boot_cpus()/smp_commence() is replaced by
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* smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
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* 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/acpi.h>
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#include <linux/bootmem.h>
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#include <linux/cpu.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/kernel_stat.h>
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#include <linux/mm.h>
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#include <linux/notifier.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/spinlock.h>
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#include <linux/efi.h>
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#include <linux/percpu.h>
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#include <linux/bitops.h>
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#include <asm/atomic.h>
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#include <asm/cache.h>
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#include <asm/current.h>
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#include <asm/delay.h>
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#include <asm/ia32.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/machvec.h>
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#include <asm/mca.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/sal.h>
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#include <asm/system.h>
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#include <asm/tlbflush.h>
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#include <asm/unistd.h>
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#define SMP_DEBUG 0
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#if SMP_DEBUG
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#define Dprintk(x...) printk(x)
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#else
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#define Dprintk(x...)
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* Store all idle threads, this can be reused instead of creating
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* a new thread. Also avoids complicated thread destroy functionality
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* for idle threads.
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*/
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struct task_struct *idle_thread_array[NR_CPUS];
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/*
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* Global array allocated for NR_CPUS at boot time
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*/
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struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
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/*
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* start_ap in head.S uses this to store current booting cpu
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* info.
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*/
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struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
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#define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
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#define get_idle_for_cpu(x) (idle_thread_array[(x)])
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#define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
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#else
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#define get_idle_for_cpu(x) (NULL)
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#define set_idle_for_cpu(x,p)
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#define set_brendez_area(x)
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#endif
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/*
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* ITC synchronization related stuff:
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*/
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#define MASTER 0
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#define SLAVE (SMP_CACHE_BYTES/8)
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#define NUM_ROUNDS 64 /* magic value */
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#define NUM_ITERS 5 /* likewise */
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static DEFINE_SPINLOCK(itc_sync_lock);
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static volatile unsigned long go[SLAVE + 1];
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#define DEBUG_ITC_SYNC 0
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extern void __devinit calibrate_delay (void);
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extern void start_ap (void);
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extern unsigned long ia64_iobase;
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task_t *task_for_booting_cpu;
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/*
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* State for each CPU
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*/
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DEFINE_PER_CPU(int, cpu_state);
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/* Bitmasks of currently online, and possible CPUs */
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cpumask_t cpu_online_map;
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EXPORT_SYMBOL(cpu_online_map);
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cpumask_t cpu_possible_map;
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EXPORT_SYMBOL(cpu_possible_map);
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/* which logical CPU number maps to which CPU (physical APIC ID) */
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volatile int ia64_cpu_to_sapicid[NR_CPUS];
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EXPORT_SYMBOL(ia64_cpu_to_sapicid);
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static volatile cpumask_t cpu_callin_map;
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struct smp_boot_data smp_boot_data __initdata;
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unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
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char __initdata no_int_routing;
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unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
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static int __init
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nointroute (char *str)
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{
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no_int_routing = 1;
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printk ("no_int_routing on\n");
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return 1;
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}
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__setup("nointroute", nointroute);
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void
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sync_master (void *arg)
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{
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unsigned long flags, i;
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go[MASTER] = 0;
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local_irq_save(flags);
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{
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for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
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while (!go[MASTER]);
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go[MASTER] = 0;
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go[SLAVE] = ia64_get_itc();
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}
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}
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local_irq_restore(flags);
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}
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/*
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* Return the number of cycles by which our itc differs from the itc on the master
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* (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
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* negative that it is behind.
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*/
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static inline long
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get_delta (long *rt, long *master)
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{
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unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
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unsigned long tcenter, t0, t1, tm;
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long i;
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for (i = 0; i < NUM_ITERS; ++i) {
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t0 = ia64_get_itc();
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go[MASTER] = 1;
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while (!(tm = go[SLAVE]));
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go[SLAVE] = 0;
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t1 = ia64_get_itc();
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if (t1 - t0 < best_t1 - best_t0)
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best_t0 = t0, best_t1 = t1, best_tm = tm;
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}
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*rt = best_t1 - best_t0;
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*master = best_tm - best_t0;
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/* average best_t0 and best_t1 without overflow: */
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tcenter = (best_t0/2 + best_t1/2);
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if (best_t0 % 2 + best_t1 % 2 == 2)
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++tcenter;
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return tcenter - best_tm;
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}
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/*
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* Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
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* (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
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* unaccounted-for errors (such as getting a machine check in the middle of a calibration
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* step). The basic idea is for the slave to ask the master what itc value it has and to
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* read its own itc before and after the master responds. Each iteration gives us three
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* timestamps:
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*
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* slave master
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*
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* t0 ---\
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* ---\
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* --->
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* tm
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* /---
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* /---
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* t1 <---
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*
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*
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* The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
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* and t1. If we achieve this, the clocks are synchronized provided the interconnect
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* between the slave and the master is symmetric. Even if the interconnect were
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* asymmetric, we would still know that the synchronization error is smaller than the
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* roundtrip latency (t0 - t1).
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*
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* When the interconnect is quiet and symmetric, this lets us synchronize the itc to
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* within one or two cycles. However, we can only *guarantee* that the synchronization is
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* accurate to within a round-trip time, which is typically in the range of several
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* hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
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* almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
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* than half a micro second or so.
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*/
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void
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ia64_sync_itc (unsigned int master)
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{
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long i, delta, adj, adjust_latency = 0, done = 0;
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unsigned long flags, rt, master_time_stamp, bound;
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#if DEBUG_ITC_SYNC
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struct {
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long rt; /* roundtrip time */
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long master; /* master's timestamp */
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long diff; /* difference between midpoint and master's timestamp */
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long lat; /* estimate of itc adjustment latency */
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} t[NUM_ROUNDS];
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#endif
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/*
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* Make sure local timer ticks are disabled while we sync. If
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* they were enabled, we'd have to worry about nasty issues
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* like setting the ITC ahead of (or a long time before) the
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* next scheduled tick.
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*/
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BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
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go[MASTER] = 1;
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if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
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printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
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return;
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}
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while (go[MASTER]); /* wait for master to be ready */
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spin_lock_irqsave(&itc_sync_lock, flags);
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{
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for (i = 0; i < NUM_ROUNDS; ++i) {
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delta = get_delta(&rt, &master_time_stamp);
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if (delta == 0) {
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done = 1; /* let's lock on to this... */
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bound = rt;
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}
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if (!done) {
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if (i > 0) {
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adjust_latency += -delta;
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adj = -delta + adjust_latency/4;
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} else
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adj = -delta;
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ia64_set_itc(ia64_get_itc() + adj);
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}
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#if DEBUG_ITC_SYNC
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t[i].rt = rt;
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t[i].master = master_time_stamp;
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t[i].diff = delta;
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t[i].lat = adjust_latency/4;
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#endif
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}
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}
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spin_unlock_irqrestore(&itc_sync_lock, flags);
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#if DEBUG_ITC_SYNC
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for (i = 0; i < NUM_ROUNDS; ++i)
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printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
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t[i].rt, t[i].master, t[i].diff, t[i].lat);
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#endif
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printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
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"maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
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}
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/*
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* Ideally sets up per-cpu profiling hooks. Doesn't do much now...
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*/
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static inline void __devinit
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smp_setup_percpu_timer (void)
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{
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}
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static void __devinit
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smp_callin (void)
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{
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int cpuid, phys_id;
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extern void ia64_init_itm(void);
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#ifdef CONFIG_PERFMON
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extern void pfm_init_percpu(void);
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#endif
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cpuid = smp_processor_id();
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phys_id = hard_smp_processor_id();
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if (cpu_online(cpuid)) {
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printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
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phys_id, cpuid);
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BUG();
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}
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lock_ipi_calllock();
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cpu_set(cpuid, cpu_online_map);
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unlock_ipi_calllock();
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smp_setup_percpu_timer();
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ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
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#ifdef CONFIG_PERFMON
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pfm_init_percpu();
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#endif
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local_irq_enable();
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if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
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/*
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* Synchronize the ITC with the BP. Need to do this after irqs are
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* enabled because ia64_sync_itc() calls smp_call_function_single(), which
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* calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
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* local_bh_enable(), which bugs out if irqs are not enabled...
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*/
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Dprintk("Going to syncup ITC with BP.\n");
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ia64_sync_itc(0);
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}
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/*
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* Get our bogomips.
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*/
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ia64_init_itm();
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calibrate_delay();
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local_cpu_data->loops_per_jiffy = loops_per_jiffy;
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#ifdef CONFIG_IA32_SUPPORT
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ia32_gdt_init();
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#endif
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/*
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* Allow the master to continue.
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*/
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cpu_set(cpuid, cpu_callin_map);
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Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
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}
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/*
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* Activate a secondary processor. head.S calls this.
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*/
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int __devinit
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start_secondary (void *unused)
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{
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/* Early console may use I/O ports */
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ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
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Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
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efi_map_pal_code();
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cpu_init();
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smp_callin();
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cpu_idle();
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return 0;
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}
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struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
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{
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return NULL;
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}
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struct create_idle {
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struct task_struct *idle;
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struct completion done;
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int cpu;
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};
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void
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do_fork_idle(void *_c_idle)
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{
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struct create_idle *c_idle = _c_idle;
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c_idle->idle = fork_idle(c_idle->cpu);
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complete(&c_idle->done);
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}
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static int __devinit
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do_boot_cpu (int sapicid, int cpu)
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{
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int timeout;
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struct create_idle c_idle = {
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.cpu = cpu,
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.done = COMPLETION_INITIALIZER(c_idle.done),
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};
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DECLARE_WORK(work, do_fork_idle, &c_idle);
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c_idle.idle = get_idle_for_cpu(cpu);
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if (c_idle.idle) {
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init_idle(c_idle.idle, cpu);
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goto do_rest;
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}
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/*
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* We can't use kernel_thread since we must avoid to reschedule the child.
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*/
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if (!keventd_up() || current_is_keventd())
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work.func(work.data);
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else {
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schedule_work(&work);
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wait_for_completion(&c_idle.done);
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}
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if (IS_ERR(c_idle.idle))
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panic("failed fork for CPU %d", cpu);
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set_idle_for_cpu(cpu, c_idle.idle);
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do_rest:
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task_for_booting_cpu = c_idle.idle;
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Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
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set_brendez_area(cpu);
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platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
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/*
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* Wait 10s total for the AP to start
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*/
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Dprintk("Waiting on callin_map ...");
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for (timeout = 0; timeout < 100000; timeout++) {
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if (cpu_isset(cpu, cpu_callin_map))
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break; /* It has booted */
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udelay(100);
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}
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Dprintk("\n");
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if (!cpu_isset(cpu, cpu_callin_map)) {
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printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
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ia64_cpu_to_sapicid[cpu] = -1;
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cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */
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return -EINVAL;
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}
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return 0;
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}
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static int __init
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decay (char *str)
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{
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int ticks;
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get_option (&str, &ticks);
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return 1;
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}
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__setup("decay=", decay);
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/*
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* Initialize the logical CPU number to SAPICID mapping
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*/
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void __init
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smp_build_cpu_map (void)
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{
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int sapicid, cpu, i;
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int boot_cpu_id = hard_smp_processor_id();
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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ia64_cpu_to_sapicid[cpu] = -1;
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#ifdef CONFIG_HOTPLUG_CPU
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cpu_set(cpu, cpu_possible_map);
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#endif
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}
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ia64_cpu_to_sapicid[0] = boot_cpu_id;
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cpus_clear(cpu_present_map);
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cpu_set(0, cpu_present_map);
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cpu_set(0, cpu_possible_map);
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for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
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sapicid = smp_boot_data.cpu_phys_id[i];
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if (sapicid == boot_cpu_id)
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continue;
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cpu_set(cpu, cpu_present_map);
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cpu_set(cpu, cpu_possible_map);
|
|
ia64_cpu_to_sapicid[cpu] = sapicid;
|
|
cpu++;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_NUMA
|
|
|
|
/* on which node is each logical CPU (one cacheline even for 64 CPUs) */
|
|
u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
|
|
EXPORT_SYMBOL(cpu_to_node_map);
|
|
/* which logical CPUs are on which nodes */
|
|
cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
|
|
|
|
/*
|
|
* Build cpu to node mapping and initialize the per node cpu masks.
|
|
*/
|
|
void __init
|
|
build_cpu_to_node_map (void)
|
|
{
|
|
int cpu, i, node;
|
|
|
|
for(node=0; node<MAX_NUMNODES; node++)
|
|
cpus_clear(node_to_cpu_mask[node]);
|
|
for(cpu = 0; cpu < NR_CPUS; ++cpu) {
|
|
/*
|
|
* All Itanium NUMA platforms I know use ACPI, so maybe we
|
|
* can drop this ifdef completely. [EF]
|
|
*/
|
|
#ifdef CONFIG_ACPI_NUMA
|
|
node = -1;
|
|
for (i = 0; i < NR_CPUS; ++i)
|
|
if (cpu_physical_id(cpu) == node_cpuid[i].phys_id) {
|
|
node = node_cpuid[i].nid;
|
|
break;
|
|
}
|
|
#else
|
|
# error Fixme: Dunno how to build CPU-to-node map.
|
|
#endif
|
|
cpu_to_node_map[cpu] = (node >= 0) ? node : 0;
|
|
if (node >= 0)
|
|
cpu_set(cpu, node_to_cpu_mask[node]);
|
|
}
|
|
}
|
|
|
|
#endif /* CONFIG_NUMA */
|
|
|
|
/*
|
|
* Cycle through the APs sending Wakeup IPIs to boot each.
|
|
*/
|
|
void __init
|
|
smp_prepare_cpus (unsigned int max_cpus)
|
|
{
|
|
int boot_cpu_id = hard_smp_processor_id();
|
|
|
|
/*
|
|
* Initialize the per-CPU profiling counter/multiplier
|
|
*/
|
|
|
|
smp_setup_percpu_timer();
|
|
|
|
/*
|
|
* We have the boot CPU online for sure.
|
|
*/
|
|
cpu_set(0, cpu_online_map);
|
|
cpu_set(0, cpu_callin_map);
|
|
|
|
local_cpu_data->loops_per_jiffy = loops_per_jiffy;
|
|
ia64_cpu_to_sapicid[0] = boot_cpu_id;
|
|
|
|
printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
|
|
|
|
current_thread_info()->cpu = 0;
|
|
|
|
/*
|
|
* If SMP should be disabled, then really disable it!
|
|
*/
|
|
if (!max_cpus) {
|
|
printk(KERN_INFO "SMP mode deactivated.\n");
|
|
cpus_clear(cpu_online_map);
|
|
cpus_clear(cpu_present_map);
|
|
cpus_clear(cpu_possible_map);
|
|
cpu_set(0, cpu_online_map);
|
|
cpu_set(0, cpu_present_map);
|
|
cpu_set(0, cpu_possible_map);
|
|
return;
|
|
}
|
|
}
|
|
|
|
void __devinit smp_prepare_boot_cpu(void)
|
|
{
|
|
cpu_set(smp_processor_id(), cpu_online_map);
|
|
cpu_set(smp_processor_id(), cpu_callin_map);
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
extern void fixup_irqs(void);
|
|
/* must be called with cpucontrol mutex held */
|
|
int __cpu_disable(void)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
|
|
/*
|
|
* dont permit boot processor for now
|
|
*/
|
|
if (cpu == 0)
|
|
return -EBUSY;
|
|
|
|
fixup_irqs();
|
|
local_flush_tlb_all();
|
|
cpu_clear(cpu, cpu_callin_map);
|
|
return 0;
|
|
}
|
|
|
|
void __cpu_die(unsigned int cpu)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < 100; i++) {
|
|
/* They ack this in play_dead by setting CPU_DEAD */
|
|
if (per_cpu(cpu_state, cpu) == CPU_DEAD)
|
|
{
|
|
printk ("CPU %d is now offline\n", cpu);
|
|
return;
|
|
}
|
|
msleep(100);
|
|
}
|
|
printk(KERN_ERR "CPU %u didn't die...\n", cpu);
|
|
}
|
|
#else /* !CONFIG_HOTPLUG_CPU */
|
|
int __cpu_disable(void)
|
|
{
|
|
return -ENOSYS;
|
|
}
|
|
|
|
void __cpu_die(unsigned int cpu)
|
|
{
|
|
/* We said "no" in __cpu_disable */
|
|
BUG();
|
|
}
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
void
|
|
smp_cpus_done (unsigned int dummy)
|
|
{
|
|
int cpu;
|
|
unsigned long bogosum = 0;
|
|
|
|
/*
|
|
* Allow the user to impress friends.
|
|
*/
|
|
|
|
for (cpu = 0; cpu < NR_CPUS; cpu++)
|
|
if (cpu_online(cpu))
|
|
bogosum += cpu_data(cpu)->loops_per_jiffy;
|
|
|
|
printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
|
|
(int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
|
|
}
|
|
|
|
int __devinit
|
|
__cpu_up (unsigned int cpu)
|
|
{
|
|
int ret;
|
|
int sapicid;
|
|
|
|
sapicid = ia64_cpu_to_sapicid[cpu];
|
|
if (sapicid == -1)
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* Already booted cpu? not valid anymore since we dont
|
|
* do idle loop tightspin anymore.
|
|
*/
|
|
if (cpu_isset(cpu, cpu_callin_map))
|
|
return -EINVAL;
|
|
|
|
/* Processor goes to start_secondary(), sets online flag */
|
|
ret = do_boot_cpu(sapicid, cpu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Assume that CPU's have been discovered by some platform-dependent interface. For
|
|
* SoftSDV/Lion, that would be ACPI.
|
|
*
|
|
* Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
|
|
*/
|
|
void __init
|
|
init_smp_config(void)
|
|
{
|
|
struct fptr {
|
|
unsigned long fp;
|
|
unsigned long gp;
|
|
} *ap_startup;
|
|
long sal_ret;
|
|
|
|
/* Tell SAL where to drop the AP's. */
|
|
ap_startup = (struct fptr *) start_ap;
|
|
sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
|
|
ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
|
|
if (sal_ret < 0)
|
|
printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
|
|
ia64_sal_strerror(sal_ret));
|
|
}
|
|
|