7691d931aa
Patch from Adam Brooks The current gettimeofday implementation for the IOP3xx processors reads the contents of the timer interrupt register and does math on the value to figure out exactly what time it is. To do this it multiplies the contents of the timer register with a large constant. The result is then divided by a large constant. Unfortunately the result of the first multiplication is often too large for the register to hold. The solution is to combine the two large constants to a single smaller constant at compile time. Then the timer value can be divided by single smaller constant without any overflow issues. Signed-off-by: Adam Brooks <adam.j.brooks@intel.com> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
110 lines
2.5 KiB
C
110 lines
2.5 KiB
C
/*
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* arch/arm/mach-iop3xx/iop321-time.c
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*
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* Timer code for IOP321 based systems
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*
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* Author: Deepak Saxena <dsaxena@mvista.com>
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*
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* Copyright 2002-2003 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include <asm/mach-types.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#define IOP321_TIME_SYNC 0
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static inline unsigned long get_elapsed(void)
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{
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return LATCH - *IOP321_TU_TCR0;
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}
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static unsigned long iop321_gettimeoffset(void)
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{
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unsigned long elapsed, usec;
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u32 tisr1, tisr2;
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/*
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* If an interrupt was pending before we read the timer,
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* we've already wrapped. Factor this into the time.
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* If an interrupt was pending after we read the timer,
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* it may have wrapped between checking the interrupt
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* status and reading the timer. Re-read the timer to
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* be sure its value is after the wrap.
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*/
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
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elapsed = get_elapsed();
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
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if(tisr1 & 1)
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elapsed += LATCH;
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else if (tisr2 & 1)
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elapsed = LATCH + get_elapsed();
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/*
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* Now convert them to usec.
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*/
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usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
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return usec;
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}
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static irqreturn_t
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iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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u32 tisr;
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write_seqlock(&xtime_lock);
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
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tisr |= 1;
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asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
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timer_tick(regs);
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction iop321_timer_irq = {
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.name = "IOP321 Timer Tick",
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.handler = iop321_timer_interrupt,
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.flags = SA_INTERRUPT | SA_TIMER,
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};
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static void __init iop321_timer_init(void)
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{
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u32 timer_ctl;
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setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq);
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timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
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IOP321_TMR_RATIO_1_1;
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asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
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asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
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}
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struct sys_timer iop321_timer = {
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.init = &iop321_timer_init,
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.offset = iop321_gettimeoffset,
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};
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