Philipp Zabel 59dc3d8c86 clk: imx51: uart4, uart5 gates only exist on imx50, imx53 ... i.MX51 only has 3 UARTs and no CCGR7 register. In place of the CCGR7 register on i.MX50/i.MX53 that contains the ipg and per clock gates for UARTs 4 and 5, on i.MX51 there is the CMEOR register. Without this patch, the code disabling the UART clocks would also clear the mod_en_ov_vpu bit in the CMEOR register, among others, which causes register accesses to the VPU to lock up the system. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2017-12-21 15:59:05 -08:00
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clk-busy.c
clk-cpu.c
clk-fixup-div.c
clk-fixup-mux.c
clk-gate2.c
clk-gate-exclusive.c
clk-imx1.c
clk-imx6q.c
clk-imx6sl.c
clk-imx6sx.c
clk-imx6ul.c
clk-imx7d.c
clk-imx21.c
clk-imx25.c
clk-imx27.c
clk-imx31.c
clk-imx35.c
clk-imx51-imx53.c
clk-pfd.c
clk-pllv1.c
clk-pllv2.c
clk-pllv3.c
clk-vf610.c
clk.c
clk.h
Makefile