android_kernel_xiaomi_sm7250/include/asm-cris/arch-v32/tlb.h
Mikael Starvik 51533b615e [PATCH] CRIS update: new subarchitecture v32
New CRIS sub architecture named v32.

From: Dave Jones <davej@redhat.com>

	Fix swapped kmalloc args

Signed-off-by: Mikael Starvik <starvik@axis.com>
Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-07-27 16:26:01 -07:00

15 lines
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C

#ifndef _CRIS_ARCH_TLB_H
#define _CRIS_ARCH_TLB_H
/*
* The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
* to store the "process" it belongs to (=> fast mm context switch). The
* last page_id is never used so we can make TLB entries that never matches.
*/
#define NUM_TLB_ENTRIES 64
#define NUM_PAGEID 256
#define INVALID_PAGEID 255
#define NO_CONTEXT -1
#endif /* _CRIS_ARCH_TLB_H */