2cdf5246df
[ Upstream commit 0b15394475e3bcaf35ca4bf22fc55d56df67224e ] Testing has shown, that when using mainline U-Boot on MT7688 based boards, the system may hang or crash while mounting the root-fs. The main issue here is that mainline U-Boot configures EBase to a value near the end of system memory. And with CONFIG_CPU_MIPSR2_IRQ_VI disabled, trap_init() will not allocate a new area to place the exception handler. The original value will be used and the handler will be copied to this location, which might already be used by some userspace application. The MT7688 supports VI - its config3 register is 0x00002420, so VInt (Bit 5) is set. But without setting CONFIG_CPU_MIPSR2_IRQ_VI this bit will not be evaluated to result in "cpu_has_vi" being set. This patch now selects CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 which results trap_init() to allocate some memory for the exception handler. Please note that this issue was not seen with the Mediatek U-Boot version, as it does not touch EBase (stays at default of 0x8000.0000). This is strictly also not correct as the kernel (_text) resides here. Signed-off-by: Stefan Roese <sr@denx.de> [paul.burton@mips.com: s/beeing/being/] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: John Crispin <blogic@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by: Sasha Levin <sashal@kernel.org>
99 lines
1.6 KiB
Plaintext
99 lines
1.6 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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if RALINK
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config CLKEVT_RT3352
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bool
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depends on SOC_RT305X || SOC_MT7620
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default y
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select TIMER_OF
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select CLKSRC_MMIO
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config RALINK_ILL_ACC
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bool
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depends on SOC_RT305X
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default y
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config IRQ_INTC
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bool
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default y
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depends on !SOC_MT7621
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choice
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prompt "Ralink SoC selection"
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default SOC_RT305X
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help
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Select Ralink MIPS SoC type.
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config SOC_RT288X
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bool "RT288x"
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select MIPS_L1_CACHE_SHIFT_4
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select HW_HAS_PCI
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config SOC_RT305X
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bool "RT305x"
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config SOC_RT3883
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bool "RT3883"
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select HW_HAS_PCI
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config SOC_MT7620
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bool "MT7620/8"
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select CPU_MIPSR2_IRQ_VI
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select HW_HAS_PCI
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config SOC_MT7621
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bool "MT7621"
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select MIPS_CPU_SCACHE
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select SYS_SUPPORTS_MULTITHREADING
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select SYS_SUPPORTS_SMP
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select SYS_SUPPORTS_MIPS_CPS
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select SYS_SUPPORTS_HIGHMEM
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select MIPS_GIC
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select COMMON_CLK
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select CLKSRC_MIPS_GIC
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select HW_HAS_PCI
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endchoice
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choice
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prompt "Devicetree selection"
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default DTB_RT_NONE
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help
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Select the devicetree.
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config DTB_RT_NONE
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bool "None"
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config DTB_RT2880_EVAL
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bool "RT2880 eval kit"
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depends on SOC_RT288X
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select BUILTIN_DTB
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config DTB_RT305X_EVAL
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bool "RT305x eval kit"
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depends on SOC_RT305X
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select BUILTIN_DTB
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config DTB_RT3883_EVAL
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bool "RT3883 eval kit"
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depends on SOC_RT3883
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select BUILTIN_DTB
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config DTB_MT7620A_EVAL
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bool "MT7620A eval kit"
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depends on SOC_MT7620
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select BUILTIN_DTB
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config DTB_OMEGA2P
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bool "Onion Omega2+"
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depends on SOC_MT7620
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select BUILTIN_DTB
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config DTB_VOCORE2
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bool "VoCore2"
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depends on SOC_MT7620
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select BUILTIN_DTB
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endchoice
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endif
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