15e9b586e0
In case of re-IPL and diag308 doesn't work we have to reset all devices
manually and wait synchronously that each reset finished.
This patch adds the necessary infrastucture and the first exploiter of it.
Subsystems that need to add a function that needs to be called at re-IPL
may register/unregister this function via
struct reset_call {
struct reset_call *next;
void (*fn)(void);
};
void register_reset_call(struct reset_call *reset);
void unregister_reset_call(struct reset_call *reset);
When the registered function get called the context is:
- all cpus beside the current one are stopped
- all machine checks and interrupts are disabled
- prefixing is disabled
- a default machine check handler is available for use
The registered functions may not take any locks are sleep.
For the common I/O layer part of this patch:
Introduce a reset_call css_reset that does the following:
- clear all subchannels
- perform a rchp on all channel paths and wait for the resulting
machine checks
This replaces the calls to clear_all_subchannels() and
cio_reset_channel_paths() for kexec and ccw reipl. reipl_ccw_dev() now
uses reipl_find_schid() to determine the subchannel id for a given
device id.
Also remove cio_reset_channel_paths() and friends since they are not
needed anymore.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
106 lines
3.1 KiB
ArmAsm
106 lines
3.1 KiB
ArmAsm
/*
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* arch/s390/kernel/reipl.S
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*
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* S390 version
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* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
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Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
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*/
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#include <asm/lowcore.h>
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.globl do_reipl_asm
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do_reipl_asm: basr %r13,0
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.Lpg0: lpswe .Lnewpsw-.Lpg0(%r13)
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.Lpg1: # do store status of all registers
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stg %r1,.Lregsave-.Lpg0(%r13)
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lghi %r1,0x1000
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stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-0x1000(%r1)
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lg %r0,.Lregsave-.Lpg0(%r13)
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stg %r0,__LC_GPREGS_SAVE_AREA-0x1000+8(%r1)
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stctg %c0,%c15,__LC_CREGS_SAVE_AREA-0x1000(%r1)
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stam %a0,%a15,__LC_AREGS_SAVE_AREA-0x1000(%r1)
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stpx __LC_PREFIX_SAVE_AREA-0x1000(%r1)
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stfpc __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
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stckc .Lclkcmp-.Lpg0(%r13)
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mvc __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
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stpt __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
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stg %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
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lctlg %c6,%c6,.Lall-.Lpg0(%r13)
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lgr %r1,%r2
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mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
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stsch .Lschib-.Lpg0(%r13)
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oi .Lschib+5-.Lpg0(%r13),0x84
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.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
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msch .Lschib-.Lpg0(%r13)
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lghi %r0,5
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.Lssch: ssch .Liplorb-.Lpg0(%r13)
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jz .L001
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brct %r0,.Lssch
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
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.Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
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.Lcont: c %r1,__LC_SUBCHANNEL_ID
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jnz .Ltpi
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clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
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jnz .Ltpi
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tsch .Liplirb-.Lpg0(%r13)
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tm .Liplirb+9-.Lpg0(%r13),0xbf
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jz .L002
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
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jz .L003
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bas %r14,.Ldisab-.Lpg0(%r13)
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.L003: st %r1,__LC_SUBCHANNEL_ID
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lhi %r1,0 # mode 0 = esa
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slr %r0,%r0 # set cpuid to zero
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sigp %r1,%r0,0x12 # switch to esa mode
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lpsw 0
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.Ldisab: sll %r14,1
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srl %r14,1 # need to kill hi bit to avoid specification exceptions.
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st %r14,.Ldispsw+12-.Lpg0(%r13)
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lpswe .Ldispsw-.Lpg0(%r13)
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.align 8
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.Lclkcmp: .quad 0x0000000000000000
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.Lall: .quad 0x00000000ff000000
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.Lregsave: .quad 0x0000000000000000
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.align 16
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/*
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* These addresses have to be 31 bit otherwise
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* the sigp will throw a specifcation exception
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* when switching to ESA mode as bit 31 be set
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* in the ESA psw.
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* Bit 31 of the addresses has to be 0 for the
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* 31bit lpswe instruction a fact they appear to have
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* ommited from the pop.
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*/
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.Lnewpsw: .quad 0x0000000080000000
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.quad .Lpg1
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.Lpcnew: .quad 0x0000000080000000
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.quad .Lecs
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.Lionew: .quad 0x0000000080000000
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.quad .Lcont
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.Lwaitpsw: .quad 0x0202000080000000
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.quad .Ltpi
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.Ldispsw: .quad 0x0002000080000000
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.quad 0x0000000000000000
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.Liplccws: .long 0x02000000,0x60000018
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.long 0x08000008,0x20000001
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.Liplorb: .long 0x0049504c,0x0040ff80
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.long 0x00000000+.Liplccws
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.Lschib: .long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.Liplirb: .long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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.long 0x00000000,0x00000000
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