3c726f8dee
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel base page size to 64K. The resulting kernel still boots on any hardware. On current machines with 4K pages support only, the kernel will maintain 16 "subpages" for each 64K page transparently. Note that while real 64K capable HW has been tested, the current patch will not enable it yet as such hardware is not released yet, and I'm still verifying with the firmware architects the proper to get the information from the newer hypervisors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
144 lines
5.3 KiB
C
144 lines
5.3 KiB
C
/*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/threads.h>
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#include <linux/module.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/page.h>
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#include <asm/lppaca.h>
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#include <asm/iseries/it_lp_queue.h>
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#include <asm/paca.h>
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static union {
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struct systemcfg data;
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u8 page[PAGE_SIZE];
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} systemcfg_store __attribute__((__section__(".data.page.aligned")));
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struct systemcfg *systemcfg = &systemcfg_store.data;
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EXPORT_SYMBOL(systemcfg);
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/* This symbol is provided by the linker - let it fill in the paca
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* field correctly */
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extern unsigned long __toc_start;
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/* The Paca is an array with one entry per processor. Each contains an
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* lppaca, which contains the information shared between the
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* hypervisor and Linux. Each also contains an ItLpRegSave area which
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* is used by the hypervisor to save registers.
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* On systems with hardware multi-threading, there are two threads
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* per processor. The Paca array must contain an entry for each thread.
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* The VPD Areas will give a max logical processors = 2 * max physical
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* processors. The processor VPD array needs one entry per physical
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* processor (not thread).
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*/
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#define PACA_INIT_COMMON(number, start, asrr, asrv) \
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.lock_token = 0x8000, \
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.paca_index = (number), /* Paca Index */ \
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.default_decr = 0x00ff0000, /* Initial Decr */ \
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.kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \
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.stab_real = (asrr), /* Real pointer to segment table */ \
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.stab_addr = (asrv), /* Virt pointer to segment table */ \
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.cpu_start = (start), /* Processor start */ \
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.hw_cpu_id = 0xffff, \
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.lppaca = { \
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.desc = 0xd397d781, /* "LpPa" */ \
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.size = sizeof(struct lppaca), \
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.dyn_proc_status = 2, \
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.decr_val = 0x00ff0000, \
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.fpregs_in_use = 1, \
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.end_of_quantum = 0xfffffffffffffffful, \
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.slb_count = 64, \
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.vmxregs_in_use = 0, \
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}, \
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#ifdef CONFIG_PPC_ISERIES
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#define PACA_INIT_ISERIES(number) \
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.lppaca_ptr = &paca[number].lppaca, \
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.reg_save_ptr = &paca[number].reg_save, \
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.reg_save = { \
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.xDesc = 0xd397d9e2, /* "LpRS" */ \
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.xSize = sizeof(struct ItLpRegSave) \
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}
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#define PACA_INIT(number) \
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{ \
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PACA_INIT_COMMON(number, 0, 0, 0) \
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PACA_INIT_ISERIES(number) \
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}
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#define BOOTCPU_PACA_INIT(number) \
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{ \
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PACA_INIT_COMMON(number, 1, 0, (u64)&initial_stab) \
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PACA_INIT_ISERIES(number) \
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}
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#else
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#define PACA_INIT(number) \
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{ \
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PACA_INIT_COMMON(number, 0, 0, 0) \
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}
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#define BOOTCPU_PACA_INIT(number) \
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{ \
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PACA_INIT_COMMON(number, 1, STAB0_PHYS_ADDR, (u64)&initial_stab) \
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}
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#endif
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struct paca_struct paca[] = {
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BOOTCPU_PACA_INIT(0),
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#if NR_CPUS > 1
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PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
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#if NR_CPUS > 4
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PACA_INIT( 4), PACA_INIT( 5), PACA_INIT( 6), PACA_INIT( 7),
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#if NR_CPUS > 8
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PACA_INIT( 8), PACA_INIT( 9), PACA_INIT( 10), PACA_INIT( 11),
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PACA_INIT( 12), PACA_INIT( 13), PACA_INIT( 14), PACA_INIT( 15),
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PACA_INIT( 16), PACA_INIT( 17), PACA_INIT( 18), PACA_INIT( 19),
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PACA_INIT( 20), PACA_INIT( 21), PACA_INIT( 22), PACA_INIT( 23),
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PACA_INIT( 24), PACA_INIT( 25), PACA_INIT( 26), PACA_INIT( 27),
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PACA_INIT( 28), PACA_INIT( 29), PACA_INIT( 30), PACA_INIT( 31),
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#if NR_CPUS > 32
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PACA_INIT( 32), PACA_INIT( 33), PACA_INIT( 34), PACA_INIT( 35),
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PACA_INIT( 36), PACA_INIT( 37), PACA_INIT( 38), PACA_INIT( 39),
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PACA_INIT( 40), PACA_INIT( 41), PACA_INIT( 42), PACA_INIT( 43),
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PACA_INIT( 44), PACA_INIT( 45), PACA_INIT( 46), PACA_INIT( 47),
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PACA_INIT( 48), PACA_INIT( 49), PACA_INIT( 50), PACA_INIT( 51),
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PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
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PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
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PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
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#if NR_CPUS > 64
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PACA_INIT( 64), PACA_INIT( 65), PACA_INIT( 66), PACA_INIT( 67),
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PACA_INIT( 68), PACA_INIT( 69), PACA_INIT( 70), PACA_INIT( 71),
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PACA_INIT( 72), PACA_INIT( 73), PACA_INIT( 74), PACA_INIT( 75),
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PACA_INIT( 76), PACA_INIT( 77), PACA_INIT( 78), PACA_INIT( 79),
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PACA_INIT( 80), PACA_INIT( 81), PACA_INIT( 82), PACA_INIT( 83),
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PACA_INIT( 84), PACA_INIT( 85), PACA_INIT( 86), PACA_INIT( 87),
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PACA_INIT( 88), PACA_INIT( 89), PACA_INIT( 90), PACA_INIT( 91),
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PACA_INIT( 92), PACA_INIT( 93), PACA_INIT( 94), PACA_INIT( 95),
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PACA_INIT( 96), PACA_INIT( 97), PACA_INIT( 98), PACA_INIT( 99),
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PACA_INIT(100), PACA_INIT(101), PACA_INIT(102), PACA_INIT(103),
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PACA_INIT(104), PACA_INIT(105), PACA_INIT(106), PACA_INIT(107),
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PACA_INIT(108), PACA_INIT(109), PACA_INIT(110), PACA_INIT(111),
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PACA_INIT(112), PACA_INIT(113), PACA_INIT(114), PACA_INIT(115),
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PACA_INIT(116), PACA_INIT(117), PACA_INIT(118), PACA_INIT(119),
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PACA_INIT(120), PACA_INIT(121), PACA_INIT(122), PACA_INIT(123),
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PACA_INIT(124), PACA_INIT(125), PACA_INIT(126), PACA_INIT(127),
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#endif
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#endif
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#endif
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#endif
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#endif
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};
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EXPORT_SYMBOL(paca);
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