24f43b33f7
SPRN_SDR1 and the SPE's MFC SDR are hypervisor resources and are not accessible from a logical partition. This change adds an access wrapper. When running on bare H/W, the spufs needs to only set the SPE's MFC SDR to the value of the PPE's SPRN_SDR1 once at SPE initialization, so this change renames mfc_sdr_set() to mfc_sdr_setup() and moves the access of SPRN_SDR1 into the mmio wrapper. It also removes the now unneeded member mfc_sdr_RW from struct spu_priv1_collapsed. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> -- Signed-off-by: Paul Mackerras <paulus@samba.org>
183 lines
4.6 KiB
C
183 lines
4.6 KiB
C
/*
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* Defines an spu hypervisor abstraction layer.
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*
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* Copyright 2006 Sony Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#if !defined(_SPU_PRIV1_H)
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#define _SPU_PRIV1_H
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#if defined(__KERNEL__)
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struct spu;
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/* access to priv1 registers */
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struct spu_priv1_ops
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{
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void (*int_mask_and) (struct spu *spu, int class, u64 mask);
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void (*int_mask_or) (struct spu *spu, int class, u64 mask);
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void (*int_mask_set) (struct spu *spu, int class, u64 mask);
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u64 (*int_mask_get) (struct spu *spu, int class);
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void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
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u64 (*int_stat_get) (struct spu *spu, int class);
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void (*cpu_affinity_set) (struct spu *spu, int cpu);
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u64 (*mfc_dar_get) (struct spu *spu);
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u64 (*mfc_dsisr_get) (struct spu *spu);
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void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
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void (*mfc_sdr_setup) (struct spu *spu);
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void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
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u64 (*mfc_sr1_get) (struct spu *spu);
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void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
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u64 (*mfc_tclass_id_get) (struct spu *spu);
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void (*tlb_invalidate) (struct spu *spu);
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void (*resource_allocation_groupID_set) (struct spu *spu, u64 id);
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u64 (*resource_allocation_groupID_get) (struct spu *spu);
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void (*resource_allocation_enable_set) (struct spu *spu, u64 enable);
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u64 (*resource_allocation_enable_get) (struct spu *spu);
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};
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extern const struct spu_priv1_ops* spu_priv1_ops;
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static inline void
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spu_int_mask_and (struct spu *spu, int class, u64 mask)
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{
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spu_priv1_ops->int_mask_and(spu, class, mask);
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}
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static inline void
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spu_int_mask_or (struct spu *spu, int class, u64 mask)
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{
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spu_priv1_ops->int_mask_or(spu, class, mask);
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}
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static inline void
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spu_int_mask_set (struct spu *spu, int class, u64 mask)
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{
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spu_priv1_ops->int_mask_set(spu, class, mask);
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}
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static inline u64
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spu_int_mask_get (struct spu *spu, int class)
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{
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return spu_priv1_ops->int_mask_get(spu, class);
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}
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static inline void
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spu_int_stat_clear (struct spu *spu, int class, u64 stat)
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{
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spu_priv1_ops->int_stat_clear(spu, class, stat);
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}
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static inline u64
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spu_int_stat_get (struct spu *spu, int class)
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{
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return spu_priv1_ops->int_stat_get (spu, class);
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}
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static inline void
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spu_cpu_affinity_set (struct spu *spu, int cpu)
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{
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spu_priv1_ops->cpu_affinity_set(spu, cpu);
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}
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static inline u64
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spu_mfc_dar_get (struct spu *spu)
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{
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return spu_priv1_ops->mfc_dar_get(spu);
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}
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static inline u64
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spu_mfc_dsisr_get (struct spu *spu)
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{
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return spu_priv1_ops->mfc_dsisr_get(spu);
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}
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static inline void
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spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
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{
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spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
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}
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static inline void
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spu_mfc_sdr_setup (struct spu *spu)
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{
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spu_priv1_ops->mfc_sdr_setup(spu);
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}
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static inline void
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spu_mfc_sr1_set (struct spu *spu, u64 sr1)
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{
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spu_priv1_ops->mfc_sr1_set(spu, sr1);
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}
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static inline u64
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spu_mfc_sr1_get (struct spu *spu)
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{
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return spu_priv1_ops->mfc_sr1_get(spu);
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}
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static inline void
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spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id)
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{
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spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
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}
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static inline u64
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spu_mfc_tclass_id_get (struct spu *spu)
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{
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return spu_priv1_ops->mfc_tclass_id_get(spu);
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}
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static inline void
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spu_tlb_invalidate (struct spu *spu)
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{
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spu_priv1_ops->tlb_invalidate(spu);
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}
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static inline void
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spu_resource_allocation_groupID_set (struct spu *spu, u64 id)
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{
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spu_priv1_ops->resource_allocation_groupID_set(spu, id);
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}
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static inline u64
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spu_resource_allocation_groupID_get (struct spu *spu)
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{
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return spu_priv1_ops->resource_allocation_groupID_get(spu);
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}
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static inline void
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spu_resource_allocation_enable_set (struct spu *spu, u64 enable)
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{
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spu_priv1_ops->resource_allocation_enable_set(spu, enable);
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}
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static inline u64
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spu_resource_allocation_enable_get (struct spu *spu)
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{
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return spu_priv1_ops->resource_allocation_enable_get(spu);
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}
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/* The declarations folowing are put here for convenience
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* and only intended to be used by the platform setup code
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* for initializing spu_priv1_ops.
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*/
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extern const struct spu_priv1_ops spu_priv1_mmio_ops;
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#endif /* __KERNEL__ */
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#endif
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