5745954a5a
The L2 cache perf driver is named 'l2cache_counters' and can be used with perf tool to profile L2 cache events as below => DDR read (Read-Shared, Read-Unique, Read-Clean and Read-Not-Shared-Dirty transactions on GNOC Interface) => DDR write (Write-Back, Write-Clean and Write-Evict transactions on GNOC Interface => SNOOP Read (Read-Once, Read-Shared, Read-Unique, Read-Clean and Read-Not-Shared-Dirty transactions from GNOC to Cluster interface) => ACP Write(Write-Back, Write-Clean and Write-Evict transactions to ACP port of Collapsed Cluster) => Tenure counter(Low-Power mode tenure is used to count tenure (no. of XO- 19.2MHz) of L2 Low-Power mode. => Low/Mid/High occurrence counter: Based on threshold set for low and mid tenure counter, current tenure count is compared and based on which category it belongs, respective occurrence counter gets incremented. e.g: 1. 0 < Current Tenure <= Low-tenure threshold : Low-Tenure 2. Low-tenure < Current Tenure <= Mid-tenure threshold : Mid-Tenure 3. Mid-tenure < Current tenure : High-Tenure Change-Id: I9f8aedd21a92cbd6908deb5a8e4c7e32220bea74 Signed-off-by: Mukesh Ojha <mojha@codeaurora.org>
14 lines
556 B
Makefile
14 lines
556 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o
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obj-$(CONFIG_ARM_CCN) += arm-ccn.o
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obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
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obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
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obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o
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obj-$(CONFIG_HISI_PMU) += hisilicon/
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obj-$(CONFIG_QCOM_L2_PMU) += qcom_l2_pmu.o
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obj-$(CONFIG_QCOM_L2_COUNTERS) += qcom_l2_counters.o
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obj-$(CONFIG_QCOM_L3_PMU) += qcom_l3_pmu.o
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obj-$(CONFIG_QCOM_LLCC_PMU) += qcom_llcc_pmu.o
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obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o
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obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
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