777e0b0cb7
We currently use a DSB; ISB sequence to inhibit speculation in set_fs(). Whilst this works for current CPUs, future CPUs may implement a new SB barrier instruction which acts as an architected speculation barrier. On CPUs that support it, patch in an SB; NOP sequence over the DSB; ISB sequence and advertise the presence of the new instruction to userspace. Signed-off-by: Will Deacon <will.deacon@arm.com> Change-Id: I28e2640aff2734576f64c508cef83ad411e8d3ab |
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.. | ||
auxvec.h | ||
bitsperlong.h | ||
bpf_perf_event.h | ||
byteorder.h | ||
fcntl.h | ||
hwcap.h | ||
Kbuild | ||
kvm.h | ||
param.h | ||
perf_regs.h | ||
posix_types.h | ||
ptrace.h | ||
setup.h | ||
sigcontext.h | ||
siginfo.h | ||
signal.h | ||
stat.h | ||
statfs.h | ||
ucontext.h | ||
unistd.h |