50f91435a2
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAlzk4CsACgkQONu9yGCS aT5Xaw//UWopx4Yqbiv+4HBgW+2ijP4utxI4lBNYITD44jvkyVJnztUtVkWepu5r Tkl/7zytXOpxbpuhS0xqpWwG7lL5eT4NCG08KSX4lYQVjIWX4YzVkw9gLe9V2AaK IqTzaWtbuagARbnR3UC65TI4kjRGsr9ldY0AbbGGVTM6IwPquHN9Qd9TAzRwRohn CxY94Bwp1RcN2sSPkD3nUCUGOSNh97BXyypeM7FyceOzOpyAdQCXoUPc84cPqdNC 4GBkd5Z1IL/7zX3HDjQeGS0KK6e1enslSmsbSSUVuHI90LCr3CZPJkFF8RFnPnff 2RA7bdhp8C1JPeLDimr+SNSLEl9yywoH6d4UQAnBwoLDjiFCEITVgjDtYzzd81+1 ES6lbUAs8v/LXkaCaExq6pNNd1prg6Mj9Fe6cz+G9V/YV1tLUsoAJHdFucu8Sp7w rwz/PZ6waCf8VRO4aYFF9b+u7PQ/RFZWQYsz22P7PhAYg0CTajV1FWGk1AYi0+wQ 5YCmthbWhDo9U5lAFyQ0pVTXv/UNgEu6MfV1/jKtCk5AzsbE77orj1xusKckHq2e QojgmELmHMlFFajI0h/ddDo7iwz/5OrPVs9D03RysiOciMzdTKPucPyC0Ah4yEBA sJ0cQkaVtqO2Nu3E42lfQTpVIqBgi8NGav+kRwryB1YyKeaXLsM= =HJ7O -----END PGP SIGNATURE----- Merge 4.19.45 into android-4.19 Changes in 4.19.45 locking/rwsem: Prevent decrement of reader count before increment x86/speculation/mds: Revert CPU buffer clear on double fault exit x86/speculation/mds: Improve CPU buffer clear documentation objtool: Fix function fallthrough detection arm64: dts: rockchip: Disable DCMDs on RK3399's eMMC controller. ARM: dts: exynos: Fix interrupt for shared EINTs on Exynos5260 ARM: dts: exynos: Fix audio (microphone) routing on Odroid XU3 mmc: sdhci-of-arasan: Add DTS property to disable DCMDs. ARM: exynos: Fix a leaked reference by adding missing of_node_put power: supply: axp288_charger: Fix unchecked return value power: supply: axp288_fuel_gauge: Add ACEPC T8 and T11 mini PCs to the blacklist arm64: mmap: Ensure file offset is treated as unsigned arm64: arch_timer: Ensure counter register reads occur with seqlock held arm64: compat: Reduce address limit arm64: Clear OSDLR_EL1 on CPU boot arm64: Save and restore OSDLR_EL1 across suspend/resume sched/x86: Save [ER]FLAGS on context switch crypto: crypto4xx - fix ctr-aes missing output IV crypto: crypto4xx - fix cfb and ofb "overran dst buffer" issues crypto: salsa20 - don't access already-freed walk.iv crypto: chacha20poly1305 - set cra_name correctly crypto: ccp - Do not free psp_master when PLATFORM_INIT fails crypto: vmx - fix copy-paste error in CTR mode crypto: skcipher - don't WARN on unprocessed data after slow walk step crypto: crct10dif-generic - fix use via crypto_shash_digest() crypto: x86/crct10dif-pcl - fix use via crypto_shash_digest() crypto: arm64/gcm-aes-ce - fix no-NEON fallback code crypto: gcm - fix incompatibility between "gcm" and "gcm_base" crypto: rockchip - update IV buffer to contain the next IV crypto: arm/aes-neonbs - don't access already-freed walk.iv crypto: arm64/aes-neonbs - don't access already-freed walk.iv mmc: core: Fix tag set memory leak ALSA: line6: toneport: Fix broken usage of timer for delayed execution ALSA: usb-audio: Fix a memory leak bug ALSA: hda/hdmi - Read the pin sense from register when repolling ALSA: hda/hdmi - Consider eld_valid when reporting jack event ALSA: hda/realtek - EAPD turn on later ALSA: hdea/realtek - Headset fixup for System76 Gazelle (gaze14) ASoC: max98090: Fix restore of DAPM Muxes ASoC: RT5677-SPI: Disable 16Bit SPI Transfers ASoC: fsl_esai: Fix missing break in switch statement ASoC: codec: hdac_hdmi add device_link to card device bpf, arm64: remove prefetch insn in xadd mapping crypto: ccree - remove special handling of chained sg crypto: ccree - fix mem leak on error path crypto: ccree - don't map MAC key on stack crypto: ccree - use correct internal state sizes for export crypto: ccree - don't map AEAD key and IV on stack crypto: ccree - pm resume first enable the source clk crypto: ccree - HOST_POWER_DOWN_EN should be the last CC access during suspend crypto: ccree - add function to handle cryptocell tee fips error crypto: ccree - handle tee fips error during power management resume mm/mincore.c: make mincore() more conservative mm/huge_memory: fix vmf_insert_pfn_{pmd, pud}() crash, handle unaligned addresses mm/hugetlb.c: don't put_page in lock of hugetlb_lock hugetlb: use same fault hash key for shared and private mappings ocfs2: fix ocfs2 read inode data panic in ocfs2_iget userfaultfd: use RCU to free the task struct when fork fails ACPI: PM: Set enable_for_wake for wakeup GPEs during suspend-to-idle mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L mfd: max77620: Fix swapped FPS_PERIOD_MAX_US values mtd: spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write tty: vt.c: Fix TIOCL_BLANKSCREEN console blanking if blankinterval == 0 tty/vt: fix write/write race in ioctl(KDSKBSENT) handler jbd2: check superblock mapped prior to committing ext4: make sanity check in mballoc more strict ext4: ignore e_value_offs for xattrs with value-in-ea-inode ext4: avoid drop reference to iloc.bh twice ext4: fix use-after-free race with debug_want_extra_isize ext4: actually request zeroing of inode table after grow ext4: fix ext4_show_options for file systems w/o journal btrfs: Check the first key and level for cached extent buffer btrfs: Correctly free extent buffer in case btree_read_extent_buffer_pages fails btrfs: Honour FITRIM range constraints during free space trim Btrfs: send, flush dellaloc in order to avoid data loss Btrfs: do not start a transaction during fiemap Btrfs: do not start a transaction at iterate_extent_inodes() bcache: fix a race between cache register and cacheset unregister bcache: never set KEY_PTRS of journal key to 0 in journal_reclaim() ipmi:ssif: compare block number correctly for multi-part return messages crypto: ccm - fix incompatibility between "ccm" and "ccm_base" fs/writeback.c: use rcu_barrier() to wait for inflight wb switches going into workqueue when umount tty: Don't force RISCV SBI console as preferred console ext4: zero out the unused memory region in the extent tree block ext4: fix data corruption caused by overlapping unaligned and aligned IO ext4: fix use-after-free in dx_release() ext4: avoid panic during forced reboot due to aborted journal ALSA: hda/realtek - Corrected fixup for System76 Gazelle (gaze14) ALSA: hda/realtek - Fixup headphone noise via runtime suspend ALSA: hda/realtek - Fix for Lenovo B50-70 inverted internal microphone bug jbd2: fix potential double free KVM: x86: Skip EFER vs. guest CPUID checks for host-initiated writes KVM: lapic: Busy wait for timer to expire when using hv_timer kbuild: turn auto.conf.cmd into a mandatory include file xen/pvh: set xen_domain_type to HVM in xen_pvh_init libnvdimm/namespace: Fix label tracking error iov_iter: optimize page_copy_sane() pstore: Centralize init/exit routines pstore: Allocate compression during late_initcall() pstore: Refactor compression initialization ext4: fix compile error when using BUFFER_TRACE ext4: don't update s_rev_level if not required Linux 4.19.45 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
701 lines
17 KiB
C
701 lines
17 KiB
C
/*
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* Accelerated GHASH implementation with ARMv8 PMULL instructions.
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*
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* Copyright (C) 2014 - 2018 Linaro Ltd. <ard.biesheuvel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <asm/neon.h>
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#include <asm/simd.h>
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#include <asm/unaligned.h>
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#include <crypto/b128ops.h>
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#include <crypto/gf128mul.h>
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#include <crypto/internal/aead.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/skcipher.h>
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#include <crypto/scatterwalk.h>
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#include <linux/cpufeature.h>
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#include <linux/crypto.h>
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#include <linux/module.h>
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MODULE_DESCRIPTION("GHASH and AES-GCM using ARMv8 Crypto Extensions");
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MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_CRYPTO("ghash");
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#define GHASH_BLOCK_SIZE 16
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#define GHASH_DIGEST_SIZE 16
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#define GCM_IV_SIZE 12
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struct ghash_key {
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u64 h[2];
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u64 h2[2];
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u64 h3[2];
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u64 h4[2];
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be128 k;
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};
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struct ghash_desc_ctx {
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u64 digest[GHASH_DIGEST_SIZE/sizeof(u64)];
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u8 buf[GHASH_BLOCK_SIZE];
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u32 count;
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};
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struct gcm_aes_ctx {
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struct crypto_aes_ctx aes_key;
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struct ghash_key ghash_key;
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};
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asmlinkage void pmull_ghash_update_p64(int blocks, u64 dg[], const char *src,
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struct ghash_key const *k,
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const char *head);
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asmlinkage void pmull_ghash_update_p8(int blocks, u64 dg[], const char *src,
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struct ghash_key const *k,
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const char *head);
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#ifdef CONFIG_CFI_CLANG
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static inline void __cfi_pmull_ghash_update_p64(int blocks, u64 dg[],
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const char *src, struct ghash_key const *k, const char *head)
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{
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return pmull_ghash_update_p64(blocks, dg, src, k, head);
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}
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#define pmull_ghash_update_p64 __cfi_pmull_ghash_update_p64
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static inline void __cfi_pmull_ghash_update_p8(int blocks, u64 dg[],
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const char *src, struct ghash_key const *k, const char *head)
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{
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return pmull_ghash_update_p8(blocks, dg, src, k, head);
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}
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#define pmull_ghash_update_p8 __cfi_pmull_ghash_update_p8
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#endif
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static void (*pmull_ghash_update)(int blocks, u64 dg[], const char *src,
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struct ghash_key const *k,
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const char *head);
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asmlinkage void pmull_gcm_encrypt(int blocks, u64 dg[], u8 dst[],
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const u8 src[], struct ghash_key const *k,
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u8 ctr[], u32 const rk[], int rounds,
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u8 ks[]);
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asmlinkage void pmull_gcm_decrypt(int blocks, u64 dg[], u8 dst[],
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const u8 src[], struct ghash_key const *k,
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u8 ctr[], u32 const rk[], int rounds);
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asmlinkage void pmull_gcm_encrypt_block(u8 dst[], u8 const src[],
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u32 const rk[], int rounds);
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asmlinkage void __aes_arm64_encrypt(u32 *rk, u8 *out, const u8 *in, int rounds);
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static int ghash_init(struct shash_desc *desc)
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{
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struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);
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*ctx = (struct ghash_desc_ctx){};
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return 0;
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}
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static void ghash_do_update(int blocks, u64 dg[], const char *src,
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struct ghash_key *key, const char *head)
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{
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if (likely(may_use_simd())) {
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kernel_neon_begin();
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pmull_ghash_update(blocks, dg, src, key, head);
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kernel_neon_end();
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} else {
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be128 dst = { cpu_to_be64(dg[1]), cpu_to_be64(dg[0]) };
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do {
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const u8 *in = src;
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if (head) {
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in = head;
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blocks++;
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head = NULL;
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} else {
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src += GHASH_BLOCK_SIZE;
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}
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crypto_xor((u8 *)&dst, in, GHASH_BLOCK_SIZE);
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gf128mul_lle(&dst, &key->k);
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} while (--blocks);
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dg[0] = be64_to_cpu(dst.b);
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dg[1] = be64_to_cpu(dst.a);
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}
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}
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/* avoid hogging the CPU for too long */
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#define MAX_BLOCKS (SZ_64K / GHASH_BLOCK_SIZE)
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static int ghash_update(struct shash_desc *desc, const u8 *src,
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unsigned int len)
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{
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struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);
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unsigned int partial = ctx->count % GHASH_BLOCK_SIZE;
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ctx->count += len;
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if ((partial + len) >= GHASH_BLOCK_SIZE) {
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struct ghash_key *key = crypto_shash_ctx(desc->tfm);
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int blocks;
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if (partial) {
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int p = GHASH_BLOCK_SIZE - partial;
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memcpy(ctx->buf + partial, src, p);
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src += p;
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len -= p;
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}
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blocks = len / GHASH_BLOCK_SIZE;
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len %= GHASH_BLOCK_SIZE;
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do {
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int chunk = min(blocks, MAX_BLOCKS);
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ghash_do_update(chunk, ctx->digest, src, key,
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partial ? ctx->buf : NULL);
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blocks -= chunk;
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src += chunk * GHASH_BLOCK_SIZE;
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partial = 0;
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} while (unlikely(blocks > 0));
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}
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if (len)
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memcpy(ctx->buf + partial, src, len);
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return 0;
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}
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static int ghash_final(struct shash_desc *desc, u8 *dst)
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{
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struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);
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unsigned int partial = ctx->count % GHASH_BLOCK_SIZE;
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if (partial) {
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struct ghash_key *key = crypto_shash_ctx(desc->tfm);
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memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial);
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ghash_do_update(1, ctx->digest, ctx->buf, key, NULL);
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}
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put_unaligned_be64(ctx->digest[1], dst);
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put_unaligned_be64(ctx->digest[0], dst + 8);
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*ctx = (struct ghash_desc_ctx){};
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return 0;
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}
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static void ghash_reflect(u64 h[], const be128 *k)
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{
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u64 carry = be64_to_cpu(k->a) & BIT(63) ? 1 : 0;
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h[0] = (be64_to_cpu(k->b) << 1) | carry;
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h[1] = (be64_to_cpu(k->a) << 1) | (be64_to_cpu(k->b) >> 63);
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if (carry)
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h[1] ^= 0xc200000000000000UL;
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}
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static int __ghash_setkey(struct ghash_key *key,
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const u8 *inkey, unsigned int keylen)
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{
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be128 h;
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/* needed for the fallback */
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memcpy(&key->k, inkey, GHASH_BLOCK_SIZE);
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ghash_reflect(key->h, &key->k);
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h = key->k;
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gf128mul_lle(&h, &key->k);
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ghash_reflect(key->h2, &h);
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gf128mul_lle(&h, &key->k);
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ghash_reflect(key->h3, &h);
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gf128mul_lle(&h, &key->k);
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ghash_reflect(key->h4, &h);
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return 0;
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}
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static int ghash_setkey(struct crypto_shash *tfm,
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const u8 *inkey, unsigned int keylen)
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{
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struct ghash_key *key = crypto_shash_ctx(tfm);
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if (keylen != GHASH_BLOCK_SIZE) {
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crypto_shash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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return __ghash_setkey(key, inkey, keylen);
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}
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static struct shash_alg ghash_alg = {
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.base.cra_name = "ghash",
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.base.cra_driver_name = "ghash-ce",
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.base.cra_priority = 200,
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.base.cra_blocksize = GHASH_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct ghash_key),
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.base.cra_module = THIS_MODULE,
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.digestsize = GHASH_DIGEST_SIZE,
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.init = ghash_init,
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.update = ghash_update,
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.final = ghash_final,
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.setkey = ghash_setkey,
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.descsize = sizeof(struct ghash_desc_ctx),
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};
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static int num_rounds(struct crypto_aes_ctx *ctx)
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{
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/*
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* # of rounds specified by AES:
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* 128 bit key 10 rounds
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* 192 bit key 12 rounds
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* 256 bit key 14 rounds
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* => n byte key => 6 + (n/4) rounds
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*/
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return 6 + ctx->key_length / 4;
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}
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static int gcm_setkey(struct crypto_aead *tfm, const u8 *inkey,
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unsigned int keylen)
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{
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struct gcm_aes_ctx *ctx = crypto_aead_ctx(tfm);
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u8 key[GHASH_BLOCK_SIZE];
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int ret;
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ret = crypto_aes_expand_key(&ctx->aes_key, inkey, keylen);
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if (ret) {
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tfm->base.crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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__aes_arm64_encrypt(ctx->aes_key.key_enc, key, (u8[AES_BLOCK_SIZE]){},
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num_rounds(&ctx->aes_key));
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return __ghash_setkey(&ctx->ghash_key, key, sizeof(be128));
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}
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static int gcm_setauthsize(struct crypto_aead *tfm, unsigned int authsize)
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{
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switch (authsize) {
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case 4:
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case 8:
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case 12 ... 16:
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static void gcm_update_mac(u64 dg[], const u8 *src, int count, u8 buf[],
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int *buf_count, struct gcm_aes_ctx *ctx)
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{
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if (*buf_count > 0) {
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int buf_added = min(count, GHASH_BLOCK_SIZE - *buf_count);
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memcpy(&buf[*buf_count], src, buf_added);
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*buf_count += buf_added;
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src += buf_added;
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count -= buf_added;
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}
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if (count >= GHASH_BLOCK_SIZE || *buf_count == GHASH_BLOCK_SIZE) {
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int blocks = count / GHASH_BLOCK_SIZE;
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ghash_do_update(blocks, dg, src, &ctx->ghash_key,
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*buf_count ? buf : NULL);
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src += blocks * GHASH_BLOCK_SIZE;
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count %= GHASH_BLOCK_SIZE;
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*buf_count = 0;
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}
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if (count > 0) {
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memcpy(buf, src, count);
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*buf_count = count;
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}
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}
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static void gcm_calculate_auth_mac(struct aead_request *req, u64 dg[])
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{
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struct crypto_aead *aead = crypto_aead_reqtfm(req);
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struct gcm_aes_ctx *ctx = crypto_aead_ctx(aead);
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u8 buf[GHASH_BLOCK_SIZE];
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struct scatter_walk walk;
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u32 len = req->assoclen;
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int buf_count = 0;
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scatterwalk_start(&walk, req->src);
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do {
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u32 n = scatterwalk_clamp(&walk, len);
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u8 *p;
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if (!n) {
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scatterwalk_start(&walk, sg_next(walk.sg));
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n = scatterwalk_clamp(&walk, len);
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}
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p = scatterwalk_map(&walk);
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gcm_update_mac(dg, p, n, buf, &buf_count, ctx);
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len -= n;
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scatterwalk_unmap(p);
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scatterwalk_advance(&walk, n);
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scatterwalk_done(&walk, 0, len);
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} while (len);
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if (buf_count) {
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memset(&buf[buf_count], 0, GHASH_BLOCK_SIZE - buf_count);
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ghash_do_update(1, dg, buf, &ctx->ghash_key, NULL);
|
|
}
|
|
}
|
|
|
|
static void gcm_final(struct aead_request *req, struct gcm_aes_ctx *ctx,
|
|
u64 dg[], u8 tag[], int cryptlen)
|
|
{
|
|
u8 mac[AES_BLOCK_SIZE];
|
|
u128 lengths;
|
|
|
|
lengths.a = cpu_to_be64(req->assoclen * 8);
|
|
lengths.b = cpu_to_be64(cryptlen * 8);
|
|
|
|
ghash_do_update(1, dg, (void *)&lengths, &ctx->ghash_key, NULL);
|
|
|
|
put_unaligned_be64(dg[1], mac);
|
|
put_unaligned_be64(dg[0], mac + 8);
|
|
|
|
crypto_xor(tag, mac, AES_BLOCK_SIZE);
|
|
}
|
|
|
|
static int gcm_encrypt(struct aead_request *req)
|
|
{
|
|
struct crypto_aead *aead = crypto_aead_reqtfm(req);
|
|
struct gcm_aes_ctx *ctx = crypto_aead_ctx(aead);
|
|
struct skcipher_walk walk;
|
|
u8 iv[AES_BLOCK_SIZE];
|
|
u8 ks[2 * AES_BLOCK_SIZE];
|
|
u8 tag[AES_BLOCK_SIZE];
|
|
u64 dg[2] = {};
|
|
int nrounds = num_rounds(&ctx->aes_key);
|
|
int err;
|
|
|
|
if (req->assoclen)
|
|
gcm_calculate_auth_mac(req, dg);
|
|
|
|
memcpy(iv, req->iv, GCM_IV_SIZE);
|
|
put_unaligned_be32(1, iv + GCM_IV_SIZE);
|
|
|
|
err = skcipher_walk_aead_encrypt(&walk, req, false);
|
|
|
|
if (likely(may_use_simd() && walk.total >= 2 * AES_BLOCK_SIZE)) {
|
|
u32 const *rk = NULL;
|
|
|
|
kernel_neon_begin();
|
|
pmull_gcm_encrypt_block(tag, iv, ctx->aes_key.key_enc, nrounds);
|
|
put_unaligned_be32(2, iv + GCM_IV_SIZE);
|
|
pmull_gcm_encrypt_block(ks, iv, NULL, nrounds);
|
|
put_unaligned_be32(3, iv + GCM_IV_SIZE);
|
|
pmull_gcm_encrypt_block(ks + AES_BLOCK_SIZE, iv, NULL, nrounds);
|
|
put_unaligned_be32(4, iv + GCM_IV_SIZE);
|
|
|
|
do {
|
|
int blocks = walk.nbytes / (2 * AES_BLOCK_SIZE) * 2;
|
|
|
|
if (rk)
|
|
kernel_neon_begin();
|
|
|
|
pmull_gcm_encrypt(blocks, dg, walk.dst.virt.addr,
|
|
walk.src.virt.addr, &ctx->ghash_key,
|
|
iv, rk, nrounds, ks);
|
|
kernel_neon_end();
|
|
|
|
err = skcipher_walk_done(&walk,
|
|
walk.nbytes % (2 * AES_BLOCK_SIZE));
|
|
|
|
rk = ctx->aes_key.key_enc;
|
|
} while (walk.nbytes >= 2 * AES_BLOCK_SIZE);
|
|
} else {
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc, tag, iv, nrounds);
|
|
put_unaligned_be32(2, iv + GCM_IV_SIZE);
|
|
|
|
while (walk.nbytes >= (2 * AES_BLOCK_SIZE)) {
|
|
const int blocks =
|
|
walk.nbytes / (2 * AES_BLOCK_SIZE) * 2;
|
|
u8 *dst = walk.dst.virt.addr;
|
|
u8 *src = walk.src.virt.addr;
|
|
int remaining = blocks;
|
|
|
|
do {
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc,
|
|
ks, iv, nrounds);
|
|
crypto_xor_cpy(dst, src, ks, AES_BLOCK_SIZE);
|
|
crypto_inc(iv, AES_BLOCK_SIZE);
|
|
|
|
dst += AES_BLOCK_SIZE;
|
|
src += AES_BLOCK_SIZE;
|
|
} while (--remaining > 0);
|
|
|
|
ghash_do_update(blocks, dg,
|
|
walk.dst.virt.addr, &ctx->ghash_key,
|
|
NULL);
|
|
|
|
err = skcipher_walk_done(&walk,
|
|
walk.nbytes % (2 * AES_BLOCK_SIZE));
|
|
}
|
|
if (walk.nbytes) {
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc, ks, iv,
|
|
nrounds);
|
|
if (walk.nbytes > AES_BLOCK_SIZE) {
|
|
crypto_inc(iv, AES_BLOCK_SIZE);
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc,
|
|
ks + AES_BLOCK_SIZE, iv,
|
|
nrounds);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* handle the tail */
|
|
if (walk.nbytes) {
|
|
u8 buf[GHASH_BLOCK_SIZE];
|
|
unsigned int nbytes = walk.nbytes;
|
|
u8 *dst = walk.dst.virt.addr;
|
|
u8 *head = NULL;
|
|
|
|
crypto_xor_cpy(walk.dst.virt.addr, walk.src.virt.addr, ks,
|
|
walk.nbytes);
|
|
|
|
if (walk.nbytes > GHASH_BLOCK_SIZE) {
|
|
head = dst;
|
|
dst += GHASH_BLOCK_SIZE;
|
|
nbytes %= GHASH_BLOCK_SIZE;
|
|
}
|
|
|
|
memcpy(buf, dst, nbytes);
|
|
memset(buf + nbytes, 0, GHASH_BLOCK_SIZE - nbytes);
|
|
ghash_do_update(!!nbytes, dg, buf, &ctx->ghash_key, head);
|
|
|
|
err = skcipher_walk_done(&walk, 0);
|
|
}
|
|
|
|
if (err)
|
|
return err;
|
|
|
|
gcm_final(req, ctx, dg, tag, req->cryptlen);
|
|
|
|
/* copy authtag to end of dst */
|
|
scatterwalk_map_and_copy(tag, req->dst, req->assoclen + req->cryptlen,
|
|
crypto_aead_authsize(aead), 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int gcm_decrypt(struct aead_request *req)
|
|
{
|
|
struct crypto_aead *aead = crypto_aead_reqtfm(req);
|
|
struct gcm_aes_ctx *ctx = crypto_aead_ctx(aead);
|
|
unsigned int authsize = crypto_aead_authsize(aead);
|
|
struct skcipher_walk walk;
|
|
u8 iv[2 * AES_BLOCK_SIZE];
|
|
u8 tag[AES_BLOCK_SIZE];
|
|
u8 buf[2 * GHASH_BLOCK_SIZE];
|
|
u64 dg[2] = {};
|
|
int nrounds = num_rounds(&ctx->aes_key);
|
|
int err;
|
|
|
|
if (req->assoclen)
|
|
gcm_calculate_auth_mac(req, dg);
|
|
|
|
memcpy(iv, req->iv, GCM_IV_SIZE);
|
|
put_unaligned_be32(1, iv + GCM_IV_SIZE);
|
|
|
|
err = skcipher_walk_aead_decrypt(&walk, req, false);
|
|
|
|
if (likely(may_use_simd() && walk.total >= 2 * AES_BLOCK_SIZE)) {
|
|
u32 const *rk = NULL;
|
|
|
|
kernel_neon_begin();
|
|
pmull_gcm_encrypt_block(tag, iv, ctx->aes_key.key_enc, nrounds);
|
|
put_unaligned_be32(2, iv + GCM_IV_SIZE);
|
|
|
|
do {
|
|
int blocks = walk.nbytes / (2 * AES_BLOCK_SIZE) * 2;
|
|
int rem = walk.total - blocks * AES_BLOCK_SIZE;
|
|
|
|
if (rk)
|
|
kernel_neon_begin();
|
|
|
|
pmull_gcm_decrypt(blocks, dg, walk.dst.virt.addr,
|
|
walk.src.virt.addr, &ctx->ghash_key,
|
|
iv, rk, nrounds);
|
|
|
|
/* check if this is the final iteration of the loop */
|
|
if (rem < (2 * AES_BLOCK_SIZE)) {
|
|
u8 *iv2 = iv + AES_BLOCK_SIZE;
|
|
|
|
if (rem > AES_BLOCK_SIZE) {
|
|
memcpy(iv2, iv, AES_BLOCK_SIZE);
|
|
crypto_inc(iv2, AES_BLOCK_SIZE);
|
|
}
|
|
|
|
pmull_gcm_encrypt_block(iv, iv, NULL, nrounds);
|
|
|
|
if (rem > AES_BLOCK_SIZE)
|
|
pmull_gcm_encrypt_block(iv2, iv2, NULL,
|
|
nrounds);
|
|
}
|
|
|
|
kernel_neon_end();
|
|
|
|
err = skcipher_walk_done(&walk,
|
|
walk.nbytes % (2 * AES_BLOCK_SIZE));
|
|
|
|
rk = ctx->aes_key.key_enc;
|
|
} while (walk.nbytes >= 2 * AES_BLOCK_SIZE);
|
|
} else {
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc, tag, iv, nrounds);
|
|
put_unaligned_be32(2, iv + GCM_IV_SIZE);
|
|
|
|
while (walk.nbytes >= (2 * AES_BLOCK_SIZE)) {
|
|
int blocks = walk.nbytes / (2 * AES_BLOCK_SIZE) * 2;
|
|
u8 *dst = walk.dst.virt.addr;
|
|
u8 *src = walk.src.virt.addr;
|
|
|
|
ghash_do_update(blocks, dg, walk.src.virt.addr,
|
|
&ctx->ghash_key, NULL);
|
|
|
|
do {
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc,
|
|
buf, iv, nrounds);
|
|
crypto_xor_cpy(dst, src, buf, AES_BLOCK_SIZE);
|
|
crypto_inc(iv, AES_BLOCK_SIZE);
|
|
|
|
dst += AES_BLOCK_SIZE;
|
|
src += AES_BLOCK_SIZE;
|
|
} while (--blocks > 0);
|
|
|
|
err = skcipher_walk_done(&walk,
|
|
walk.nbytes % (2 * AES_BLOCK_SIZE));
|
|
}
|
|
if (walk.nbytes) {
|
|
if (walk.nbytes > AES_BLOCK_SIZE) {
|
|
u8 *iv2 = iv + AES_BLOCK_SIZE;
|
|
|
|
memcpy(iv2, iv, AES_BLOCK_SIZE);
|
|
crypto_inc(iv2, AES_BLOCK_SIZE);
|
|
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc, iv2,
|
|
iv2, nrounds);
|
|
}
|
|
__aes_arm64_encrypt(ctx->aes_key.key_enc, iv, iv,
|
|
nrounds);
|
|
}
|
|
}
|
|
|
|
/* handle the tail */
|
|
if (walk.nbytes) {
|
|
const u8 *src = walk.src.virt.addr;
|
|
const u8 *head = NULL;
|
|
unsigned int nbytes = walk.nbytes;
|
|
|
|
if (walk.nbytes > GHASH_BLOCK_SIZE) {
|
|
head = src;
|
|
src += GHASH_BLOCK_SIZE;
|
|
nbytes %= GHASH_BLOCK_SIZE;
|
|
}
|
|
|
|
memcpy(buf, src, nbytes);
|
|
memset(buf + nbytes, 0, GHASH_BLOCK_SIZE - nbytes);
|
|
ghash_do_update(!!nbytes, dg, buf, &ctx->ghash_key, head);
|
|
|
|
crypto_xor_cpy(walk.dst.virt.addr, walk.src.virt.addr, iv,
|
|
walk.nbytes);
|
|
|
|
err = skcipher_walk_done(&walk, 0);
|
|
}
|
|
|
|
if (err)
|
|
return err;
|
|
|
|
gcm_final(req, ctx, dg, tag, req->cryptlen - authsize);
|
|
|
|
/* compare calculated auth tag with the stored one */
|
|
scatterwalk_map_and_copy(buf, req->src,
|
|
req->assoclen + req->cryptlen - authsize,
|
|
authsize, 0);
|
|
|
|
if (crypto_memneq(tag, buf, authsize))
|
|
return -EBADMSG;
|
|
return 0;
|
|
}
|
|
|
|
static struct aead_alg gcm_aes_alg = {
|
|
.ivsize = GCM_IV_SIZE,
|
|
.chunksize = 2 * AES_BLOCK_SIZE,
|
|
.maxauthsize = AES_BLOCK_SIZE,
|
|
.setkey = gcm_setkey,
|
|
.setauthsize = gcm_setauthsize,
|
|
.encrypt = gcm_encrypt,
|
|
.decrypt = gcm_decrypt,
|
|
|
|
.base.cra_name = "gcm(aes)",
|
|
.base.cra_driver_name = "gcm-aes-ce",
|
|
.base.cra_priority = 300,
|
|
.base.cra_blocksize = 1,
|
|
.base.cra_ctxsize = sizeof(struct gcm_aes_ctx),
|
|
.base.cra_module = THIS_MODULE,
|
|
};
|
|
|
|
static int __init ghash_ce_mod_init(void)
|
|
{
|
|
int ret;
|
|
|
|
if (!(elf_hwcap & HWCAP_ASIMD))
|
|
return -ENODEV;
|
|
|
|
if (elf_hwcap & HWCAP_PMULL)
|
|
pmull_ghash_update = pmull_ghash_update_p64;
|
|
|
|
else
|
|
pmull_ghash_update = pmull_ghash_update_p8;
|
|
|
|
ret = crypto_register_shash(&ghash_alg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (elf_hwcap & HWCAP_PMULL) {
|
|
ret = crypto_register_aead(&gcm_aes_alg);
|
|
if (ret)
|
|
crypto_unregister_shash(&ghash_alg);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void __exit ghash_ce_mod_exit(void)
|
|
{
|
|
crypto_unregister_shash(&ghash_alg);
|
|
crypto_unregister_aead(&gcm_aes_alg);
|
|
}
|
|
|
|
static const struct cpu_feature ghash_cpu_feature[] = {
|
|
{ cpu_feature(PMULL) }, { }
|
|
};
|
|
MODULE_DEVICE_TABLE(cpu, ghash_cpu_feature);
|
|
|
|
module_init(ghash_ce_mod_init);
|
|
module_exit(ghash_ce_mod_exit);
|