Commit Graph

5 Commits

Author SHA1 Message Date
Rafael J. Wysocki
4f31f5b19e PM / crypto / ux500: Use struct dev_pm_ops for power management
Make the ux500 crypto driver define its PM callbacks through
struct dev_pm_ops objects rather than by using legacy PM hooks
in struct platform_driver.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-10 21:37:33 +02:00
Andreas Westin
d1cbb1447b crypto: ux500 - Cleanup hardware identification
Don't use SOC specific functions to identify
which crypto hardware we are talking to and use
the ID provided in the module instead.

Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-05-15 17:25:33 +10:00
Andreas Westin
f7329e7162 crypto: ux500 - Update DMA handling for 3.4
An update to the DMA framework added a new parameter to the
device_prep_slave_sg call.

Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-05-15 17:25:33 +10:00
Andreas Westin
8a63b1994c crypto: ux500 - Add driver for HASH hardware
This adds a driver for the ST-Ericsson ux500 hash hardware
module. The driver implements support for SHA-1 and SHA-2.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-05-04 19:04:51 +10:00
Andreas Westin
2789c08fff crypto: ux500 - Add driver for CRYP hardware
This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-05-04 19:04:51 +10:00