Commit Graph

116 Commits

Author SHA1 Message Date
Haavard Skinnemoen
d9214556b1 Merge branches 'boards' and 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6 2008-10-23 15:24:10 +02:00
Haavard Skinnemoen
e82c6106b0 avr32: Fix GPIO initcall breakage
Add essential system devices, including GPIO controllers, automatically
at core_initcall time. This ensures that the devices are there when the
PIO driver gets initialized at postcore_initcall, fixing a bug exposed
by commit d6634db8fe "avr32: Use
platform_driver_probe for pio platform driver".

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-23 15:18:33 +02:00
Haavard Skinnemoen
e3f91ca481 avr32: Scale loops_per_jiffy when cpu frequency changes
The loops_per_jiffy variable isn't updated when cpufreq changes the CPU
frequency. This could cause udelay() and friends to produce wrong
delays.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-23 15:18:33 +02:00
Alex Raimondi
6090065663 avr32: Fix bug in LCD pin setup on port C
Bug was introduced with the new at32_select_periph function.

Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-23 15:18:22 +02:00
Linus Torvalds
9301975ec2 Merge branch 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
This merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu
and x86/uv.

The sparseirq branch is just preliminary groundwork: no sparse IRQs are
actually implemented by this tree anymore - just the new APIs are added
while keeping the old way intact as well (the new APIs map 1:1 to
irq_desc[]).  The 'real' sparse IRQ support will then be a relatively
small patch ontop of this - with a v2.6.29 merge target.

* 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits)
  genirq: improve include files
  intr_remapping: fix typo
  io_apic: make irq_mis_count available on 64-bit too
  genirq: fix name space collisions of nr_irqs in arch/*
  genirq: fix name space collision of nr_irqs in autoprobe.c
  genirq: use iterators for irq_desc loops
  proc: fixup irq iterator
  genirq: add reverse iterator for irq_desc
  x86: move ack_bad_irq() to irq.c
  x86: unify show_interrupts() and proc helpers
  x86: cleanup show_interrupts
  genirq: cleanup the sparseirq modifications
  genirq: remove artifacts from sparseirq removal
  genirq: revert dynarray
  genirq: remove irq_to_desc_alloc
  genirq: remove sparse irq code
  genirq: use inline function for irq_to_desc
  genirq: consolidate nr_irqs and for_each_irq_desc()
  x86: remove sparse irq from Kconfig
  genirq: define nr_irqs for architectures with GENERIC_HARDIRQS=n
  ...
2008-10-20 13:23:01 -07:00
Thomas Gleixner
4b1135a277 genirq: fix name space collisions of nr_irqs in arch/*
local shadows of global variables are _bad_

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-10-16 16:53:30 +02:00
Dominik Brodowski
459fc208ab cpufreq: remove policy->governor setting in drivers initialization
As policy->governor is already set to CPUFREQ_DEFAULT_GOVERNOR in the
(always built-in) cpufreq core, we do not need to set it in the drivers.
This fixes the sparc64 allmodconfig build failure.

Also, remove a totally useles setting of ->policy in cpufreq-pxa3xx.c.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-15 16:42:47 -07:00
Mark Jackson
198f29358a avr32: Fix MIMC200 board use of SPD network pins
The MIMC200 board uses the SPD output pin from the Ethernet MACs for
other purposes.

One of these is as a board-reset, so I've had to #define off the SPD
output pin declaration.

This is probably not the best way of achieving this, but works in the
current framework.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-13 16:36:11 +02:00
Julien May
caf18f19ee avr32: Allow selecting multiple pins at once
at32_select_periph() now takes an u32 bitmask rather than a single pin.
This allows to set multiple pins at once.

Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-12 15:54:00 +02:00
Haavard Skinnemoen
0d62950125 Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/atmel-mci-2.6.28 2008-10-12 15:44:33 +02:00
Haavard Skinnemoen
65e8b083fc atmel-mci: Add experimental DMA support
This adds support for DMA transfers through the generic DMA engine
framework with the DMA slave extensions.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 7.5 MiB/s on fast cards with debugging disabled.

Unfortunately, the driver has been known to lock up from time to time
with DMA enabled, so DMA support is currently optional and marked
EXPERIMENTAL. However, I didn't see any problems while testing 13
different cards (MMC, SD and SDHC of different brands and sizes), so I
suspect the "Initialize BLKR before sending data transfer command" fix
that was posted earlier fixed this as well.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-05 20:39:21 +02:00
Haavard Skinnemoen
6b918657b7 atmel-mci: Platform code for supporting multiple mmc slots
Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.

Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.

Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-05 20:39:21 +02:00
Alex Raimondi
300bb76251 avr32: Replace static clock list with dynamic linked list
This replaces the at32_clock_list array with a linked list.
Clocks can now be registered (added) to the list.

Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-10-05 19:33:48 +02:00
Uwe Kleine-König
787928e747 avr32: Use platform_driver_probe for pdc platform driver
The probe function of the pdc platform driver lives in the init section
and so a pdc device that is created after the init section is discarded
probably results in an oops.  Even if this cannot happen, using
platform_driver_probe is cleaner.  (If this can happen and should be
supported the probe function must live in the devinit section instead.)

Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-22 09:51:03 +02:00
Uwe Kleine-König
d6634db8fe avr32: Use platform_driver_probe for pio platform driver
The probe function of the pio platform driver lives in the init section
and so a pio device that is created after the init section is discarded
probably results in an oops.  Even if this cannot happen, using
platform_driver_probe is cleaner.  (If this can happen and should be
supported the probe function must live in the devinit section instead.)

Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-22 09:51:03 +02:00
Haavard Skinnemoen
ece2678c62 avr32: Provide a way to deselect pins in the portmux
Currently, setting up the portmux is completely one-shot: Once a pin is
muxed, the portmux driver will complain loudly and refuse to do anything
if you try to set up the same pin again.

Sometimes, it may be necessary to change the configuration of a pin
after it has been set up initially. This patch adds a way to undo the
previous configuration, allowing the pin to be reconfigured.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-22 09:51:02 +02:00
Julien May
7066412488 avr32: Allow fine-grained control over LCDC pins
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.

Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-22 09:51:01 +02:00
Harvey Harrison
f3c450be7b avr32: use the new byteorder headers
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
[haavard.skinnemoen@atmel.com: fix <mach/io.h> build breakage]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-22 09:51:00 +02:00
Humphrey Bucknell
84c4f2f21a avr32: pm_standby low-power ram bug fix
The value stored into the SDRAMC LPR register should be the current
value of the register with the Self-refresh value set in the lower bit
field.

The bug involved only the Self-refresh value being written to the
register, thus over writing any low-power ram settings.

Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01 13:04:09 +02:00
Haavard Skinnemoen
b47eb4092f avr32: Clean up HMATRIX code
Introduce a few helper functions for HMATRIX configuration and clean up
the register definitions. Also add definitions for the HMATRIX master
and slave IDs on the AT32AP700x chips.

Also make the definitions in hmatrix.h available to board code by moving
it to <mach/hmatrix.h>

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-08 12:44:01 +02:00
Haavard Skinnemoen
a8d902db22 avr32: Add MMIO address definitions for certain controllers
Hardcoded MMIO base addresses are used a few places throughout the
platform code. Move these into the chip-specific header file so that
adding support for new chips becomes a bit easier.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-08 12:42:14 +02:00
Haavard Skinnemoen
8f8a59c664 avr32: Introduce <mach/chip.h>
This file includes the appropriate chip-specific header with MMIO, IRQ
and GPIO definitions used by the platform code. It may also be used to
provide inline GPIO accessors for drivers that are willing to sacrifice
portability for faster bitbanging.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-08 12:41:56 +02:00
Haavard Skinnemoen
3663b736a5 avr32: Use <mach/foo.h> instead of <asm/arch/foo.h>
Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-05 14:36:57 +02:00
Haavard Skinnemoen
964d219b6a avr32: Introduce arch/avr32/mach-*/include/mach
Add arch/avr32/mach-*/include to include search path and copy all the
files from include/asm/arch there. The old files will be removed once
ARM does the same change and all common drivers are converted.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-08-05 13:49:09 +02:00
David Brownell
3c26e17032 avr32: some mmc/sd cleanups
Minor cleanups for the MMC/SD support on avr32:

 - Make at32_add_device_mci() properly initialize "missing"
   platform data ... so boards like STK1002 won't try GPIO 0.

 - Switch over to gpio_is_valid() instead of testing for only
   one designated value.

 - Provide STK1002 platform data for the unlikely case that
   switches are set so first Ethernet controller isn't in use.
   (That's the only way to get card detect and writeprotect
   switch sensing on the STK1000.)

And get rid of one "unused variable" warning.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-27 13:57:36 +02:00
Haavard Skinnemoen
eda3d8f560 Merge commit 'upstream/master' 2008-07-27 13:54:08 +02:00
Linus Torvalds
9ee08c2df4 Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (57 commits)
  [MTD] [NAND] subpage read feature as a way to increase performance. 
  CPUFREQ: S3C24XX NAND driver frequency scaling support.
  [MTD][NAND] au1550nd: remove unused variable
  [MTD] jedec_probe: Fix SST 16-bit chip detection
  [MTD][MTDPART] Fix a division by zero bug
  [MTD][MTDPART] Cleanup and document the erase region handling
  [MTD][MTDPART] Handle most checkpatch findings
  [MTD][MTDPART] Seperate main loop from per-partition code in add_mtd_partition
  [MTD] physmap: resume already suspended chips on failure to suspend
  [MTD] physmap: Fix suspend/resume/shutdown bugs.
  [MTD] [NOR] Fix -ETIMEO errors in CFI driver
  [MTD] [NAND] fsl_elbc_nand: fix section mismatch with CONFIG_MTD_OF_PARTS=y
  [JFFS2] Use .unlocked_ioctl
  [MTD] Fix const assignment in the MTD command line partitioning driver
  [MTD] [NOR] gen_probe: No debug message when debugging is disabled
  [MTD] [NAND] remove __PPC__ hardcoded address from DiskOnChip drivers
  [MTD] [MAPS] Remove the bast-flash driver.
  [MTD] [NAND] fsl_elbc_nand: ecclayout cleanups
  [MTD] [NAND] fsl_elbc_nand: implement support for flash-based BBT
  [MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chips
  ...
2008-07-26 20:30:56 -07:00
David Brownell
d8f388d8dc gpio: sysfs interface
This adds a simple sysfs interface for GPIOs.

    /sys/class/gpio
    	/export ... asks the kernel to export a GPIO to userspace
    	/unexport ... to return a GPIO to the kernel
        /gpioN ... for each exported GPIO #N
	    /value ... always readable, writes fail for input GPIOs
	    /direction ... r/w as: in, out (default low); write high, low
	/gpiochipN ... for each gpiochip; #N is its first GPIO
	    /base ... (r/o) same as N
	    /label ... (r/o) descriptive, not necessarily unique
	    /ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1)

GPIOs claimed by kernel code may be exported by its owner using a new
gpio_export() call, which should be most useful for driver debugging.
Such exports may optionally be done without a "direction" attribute.

Userspace may ask to take over a GPIO by writing to a sysfs control file,
helping to cope with incomplete board support or other "one-off"
requirements that don't merit full kernel support:

  echo 23 > /sys/class/gpio/export
	... will gpio_request(23, "sysfs") and gpio_export(23);
	use /sys/class/gpio/gpio-23/direction to (re)configure it,
	when that GPIO can be used as both input and output.
  echo 23 > /sys/class/gpio/unexport
	... will gpio_free(23), when it was exported as above

The extra D-space footprint is a few hundred bytes, except for the sysfs
resources associated with each exported GPIO.  The additional I-space
footprint is about two thirds of the current size of gpiolib (!).  Since
no /dev node creation is involved, no "udev" support is needed.

Related changes:

  * This adds a device pointer to "struct gpio_chip".  When GPIO
    providers initialize that, sysfs gpio class devices become children of
    that device instead of being "virtual" devices.

  * The (few) gpio_chip providers which have such a device node have
    been updated.

  * Some gpio_chip drivers also needed to update their module "owner"
    field ...  for which missing kerneldoc was added.

  * Some gpio_chips don't support input GPIOs.  Those GPIOs are now
    flagged appropriately when the chip is registered.

Based on previous patches, and discussion both on and off LKML.

A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this
merges to mainline.

[akpm@linux-foundation.org: a few maintenance build fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Cc: Greg KH <greg@kroah.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-25 10:53:30 -07:00
David Woodhouse
ff877ea80e Merge branch 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6 2008-07-25 10:40:14 -04:00
Hans-Christian Egtvedt
218df4a25a avr32: Add platform data for AC97C platform device
This patch adds platform data to the AC97C platform device. This will
let the board add a GPIO line which is connected to the external codecs
reset line.

The platform data, ac97c_platform_data, must also contain the DMA
controller ID, RX channel ID and TX channel ID.

Tested with Wolfson WM9712 and AP7000.

Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-24 13:51:46 +02:00
Linus Torvalds
5554b35933 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits)
  I/OAT: I/OAT version 3.0 support
  I/OAT: tcp_dma_copybreak default value dependent on I/OAT version
  I/OAT: Add watchdog/reset functionality to ioatdma
  iop_adma: cleanup iop_chan_xor_slot_count
  iop_adma: document how to calculate the minimum descriptor pool size
  iop_adma: directly reclaim descriptors on allocation failure
  async_tx: make async_tx_test_ack a boolean routine
  async_tx: remove depend_tx from async_tx_sync_epilog
  async_tx: export async_tx_quiesce
  async_tx: fix handling of the "out of descriptor" condition in async_xor
  async_tx: ensure the xor destination buffer remains dma-mapped
  async_tx: list_for_each_entry_rcu() cleanup
  dmaengine: Driver for the Synopsys DesignWare DMA controller
  dmaengine: Add slave DMA interface
  dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap
  dmaengine: Add dma_client parameter to device_alloc_chan_resources
  dmatest: Simple DMA memcpy test client
  dmaengine: DMA engine driver for Marvell XOR engine
  iop-adma: fix platform driver hotplug/coldplug
  dmaengine: track the number of clients using a channel
  ...

Fixed up conflict in drivers/dca/dca-sysfs.c manually
2008-07-23 12:03:18 -07:00
Ben Nizette
fbfca4b878 avr32: clean up mci platform code
This patch does a few small cleanups around the atmel mci platform code
and in the atmel-mci driver.  The platform changes simply removes an
unused variable, uses the fact that by the end we always have some form
of platform data and notes that GPIO_PIN_NONE != 0.  This last point
could cause the incorrect attempt to twice reserve pin PA0.

While we've got the hood up, add linux/err.h to the atmel-mci.c include
list.  It needs it and generally pulls it by voodoo but I did once
stumble across a config which don't build.

This is against Linus' latest git.

Signed-off-by: Ben Nizette <bn@niasdigital.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-18 11:01:16 +02:00
Haavard Skinnemoen
7d2be0749a atmel-mci: Driver for Atmel on-chip MMC controllers
This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.

This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.

This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)

Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.

The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.

Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
2008-07-15 14:14:49 +02:00
David Woodhouse
a8931ef380 Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2008-07-11 14:36:25 +01:00
Haavard Skinnemoen
3bfb1d20b5 dmaengine: Driver for the Synopsys DesignWare DMA controller
This adds a driver for the Synopsys DesignWare DMA controller (aka
DMACA on AVR32 systems.) This DMA controller can be found integrated
on the AT32AP7000 chip and is primarily meant for peripheral DMA
transfer, but can also be used for memory-to-memory transfers.

This patch is based on a driver from David Brownell which was based on
an older version of the DMA Engine framework. It also implements the
proposed extensions to the DMA Engine API for slave DMA operations.

The dmatest client shows no problems, but there may still be room for
improvement performance-wise. DMA slave transfer performance is
definitely "good enough"; reading 100 MiB from an SD card running at ~20
MHz yields ~7.2 MiB/s average transfer rate.

Full documentation for this controller can be found in the Synopsys
DW AHB DMAC Databook:

http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf

The controller has lots of implementation options, so it's usually a
good idea to check the data sheet of the chip it's intergrated on as
well. The AT32AP7000 data sheet can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682


Changes since v4:
  * Use client_count instead of dma_chan_is_in_use()
  * Add missing include
  * Unmap buffers unless client told us not to

Changes since v3:
  * Update to latest DMA engine and DMA slave APIs
  * Embed the hw descriptor into the sw descriptor
  * Clean up and update MODULE_DESCRIPTION, copyright date, etc.

Changes since v2:
  * Dequeue all pending transfers in terminate_all()
  * Rename dw_dmac.h -> dw_dmac_regs.h
  * Define and use controller-specific dma_slave data
  * Fix up a few outdated comments
  * Define hardware registers as structs (doesn't generate better
    code, unfortunately, but it looks nicer.)
  * Get number of channels from platform_data instead of hardcoding it
    based on CONFIG_WHATEVER_CPU.
  * Give slave clients exclusive access to the channel

Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>,
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2008-07-08 11:59:42 -07:00
Hans-Christian Egtvedt
72f6befeea avr32: Fix typo of IFSR in a comment in the PIO header file
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-04 09:48:05 +02:00
Haavard Skinnemoen
02a00cf672 avr32: Power Management support ("standby" and "mem" modes)
Implement Standby support. In this mode, we'll suspend all drivers,
put the SDRAM in self-refresh mode and switch off the HSB bus
("frozen" mode.)

Implement Suspend-to-mem support. In this mode, we suspend all
drivers, put the SDRAM into self-refresh mode and switch off all
internal clocks except the 32 kHz oscillator ("stop" mode.)

The lowest-level suspend code runs from a small portion of SRAM
allocated at startup time. This gets rid of a small potential race
with the SDRAM where we might try to enter self-refresh mode in the
middle of an icache burst. We also relocate all interrupt and
exception handlers to SRAM during the small window when we enter and
exit the low-power modes.

We don't need to do any special tricks to start and stop the PLL. The
main clock is automatically gated by hardware until the PLL is stable.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02 11:05:01 +02:00
Haavard Skinnemoen
aa8e87ca61 avr32: Add system device for the internal interrupt controller (intc)
This makes the intc show up in sysfs (probably not very useful), and
allows us to easily add suspend/resume support later.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02 11:05:01 +02:00
Haavard Skinnemoen
b83d6ee175 avr32: Add simple SRAM allocator
Add SRAM allocator for avr32, which is just a thin wrapper around
genalloc.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02 11:05:01 +02:00
Haavard Skinnemoen
7951f188a0 avr32: Enable SDRAMC clock at startup
The SDRAM controller needs a clock in order to respond to our
commands, and suspend doesn't work very well without the SDRAM in
self-refresh mode.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-07-02 11:05:01 +02:00
Haavard Skinnemoen
d7ff2a4a28 avr32: Rename at32ap.c -> pdc.c
The only thing left in at32ap.c is some PDC stuff. Rename the file to
reflect what it actually does.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-28 15:08:48 +02:00
Haavard Skinnemoen
65033ed740 avr32: Move setup_platform() into chip-specific file
Combine at32_clock_init() and at32_portmux_init() into
setup_platform() and remove setup_platform() from at32ap.c. No
functional change since all setup_platform() ever did was call those
two functions.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-06-28 15:08:39 +02:00
Sedji Gaouaou
8405996ff6 atmel_pwm: Rename the "mck" clock to "pwm_clk"
The name "mck" causes a conflict on AT91. Call it "pwm_clk" instead.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:32:30 +02:00
David Brownell
9c2baf785e at32ap700x spi: enable pullups on MISO
This is a minor tweak to the at32ap700x pin configuration for the SPI
input pin (MISO), enabling the on-chip weak pullup (typical 190K) to

  (a) ensure a fixed data value for missing or input-only slaves;

  (b) prevent power waste associated with inputs floating near VDDIO/2.

Atmel's boards have no external pullup or pulldown on these pins, so
it's unlikely other boards would address these issues with external
pulldowns.  Were there trouble, board-specific code could turn off
the relevant pullup(s).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:32:29 +02:00
Hans-Christian Egtvedt
d86d314f67 avr32: Add PSIF platform devices
This patch adds the PS/2 interface (PSIF) to the device code, split into
two platform devices, one for each port.

The function for adding the PSIF platform device is also added to the
board header file.

Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:32:28 +02:00
Hans-Christian Egtvedt
47882cf620 avr32: Add pin configuration choice to LCDC peripheral
This patch lets the board code choose which pin out to use for the LCD
interface.

On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user
choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it
is vital to have the choice to select the alternative pinout since this
pinout is routed to the external headers.

Update ATSTK1002 and ATSTK1004 to use the new interface.

Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:32:27 +02:00
David Brownell
aafafddb01 avr32: minor GPIO handling updates
On the odd chance some code uses a pin as a GPIO IRQ without calling
gpio_request() or gpio_direction_input(), the debug dump should still
show its pin status.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:32:27 +02:00
Alex
60ed7951d0 avr32: Allow board to define oscillator rates
On our custom board we have other oscillator rates than on atngw100 and
atstk100x.

Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c.

This patch moves them into board specific code.

Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-27 15:07:16 +02:00
Håvard Skinnemoen
62090a08ab [MTD] [NAND] avr32: atmel_nand platform code for AT32AP700x
This function initializes and adds a platform_device for a NAND flash
interface on SMC chip select 3.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-07 08:45:36 +01:00
Håvard Skinnemoen
e1677ce4e4 avr32: move hsmc_init() to core_initcall
The board init code, typically running from postcore_initcall, may
need to set up SMC timings. We have to make sure the SMC driver is
ready before this happens.

Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2008-06-07 08:45:07 +01:00