show_tmem function do nothing that's why I removed it.
There is also cleaning of commented ancient code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze version 7.20.d is the first MB version which can be run
on MMU linux. Please do not used previous version because they contain
HW bug.
Based on WB support was necessary to redesign whole cache design.
Microblaze versions from 7.20.a don't need to disable IRQ and cache
before working with them that's why there are special structures for it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
We need to continue with next microblaze PVR version that's why
I have to remove that ancient version. These version strings not match
any versions. From Microblaze v5.00.a is possible to use this style.
I believe that none use ancients versions. If yes they will be just
labeled as unknown version.
Signed-off-by: Michal Simek <monstr@monstr.eu>
panic_timeout is in BSS section and it is cleared with BSS section.
This means that value is setup to 0.
Signed-off-by: Michal Simek <monstr@monstr.eu>
For simpleImage format we need to compile DTC. There is still possibility
to compile only Linux kernel without DTB compiled-in.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze uses timer interrupt mode. Microblaze don't have
any performance counter that's why we use just simple implementation.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Level interrupts need to be ack'd in the unmask handler, as in powerpc.
Among other issues, this bug causes the system clock to appear to run at
double-speed.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze v7.20 provides new lwx, swx instructions which bring
possibility to implement lock rutines.
There are some tests in open posix thread LTP part but current
toolchain not support it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
The functions, dev_arch_data_set_node and get_node are missing
and are needed by some device drivers such as I2C.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
The device tree handling for the gpio in the heart beat was not handling
the system when there was no gpio and it wasn't working with a newer version
of the gpio core which does not have the is-bidir property.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This is first patch which clear part of uaccess.h.
uaccess.h will be clear later.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This will ensure that kernels built with no custom CPU settings will still boot
OK on hardware that has additional CPU hardware instructions etc.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Asm code uses barrel-shifter instruction that's why we have
to protect cases when HW don't have it.
Reported-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This was intended to allow manual override of CPU settings copied automatically
to Kconfig.auto, however it's problematic for several reasons, but mostly:
* If the defconfig doesn't have ALLOW_EDIT_AUTO=y, then it's impossible for
that defconfig to iverride the values in the kernel source tree. This leads
to very strange errors where the kernel is compiled with the wrong CPUFLAGS.
Next patch in the series will back out the default in Kconfig.auto to baseline
settings, so a kernel built with no default values will at least boot on any
hardware, just not make use of additional CPU features.
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Two version are generated.
linux.bin.ub which is created from linux.bin file
and
simpleImage.<dts>.ub which is created from stripped simpleImage.<dts> file
Load address and entry point is for microblaze first instruction
which is CONFIG_KERNEL_BASE_ADDR variable.
There is possible for simpleImage format parse _start symbol too.
simpleImage.<dts> is still stripped elf file
I cleared simpleImage.<dts>.unstrip file because there are so big.
Signed-off-by: Michal Simek <monstr@monstr.eu>
After the signal frame is set up on the userspace stack, ptrace() should
be given an opportunity to single-step into the signal handler
FRV, Blackfin, mn10300 and UM. Worth to look at that patches.
Signed-off-by: Michal Simek <monstr@monstr.eu>
There is missing checking agains PVR but this is not important
for now. There are some missing checking too.
Signed-off-by: Michal Simek <monstr@monstr.eu>
We used cache_line as cache_line_lenght. For this reason
we did cache flushing 4 times longer than was necessary.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Till this patch reset always perform writen to 1.
Now we can use negative logic and perform reset write to 0.
It is opposite level than is currently read from that pin
Signed-off-by: Michal Simek <monstr@monstr.eu>
Saving is done in SAVE_STATE macros that's why another save discard
previous saved value.
This change has no effect to normal programs because they ends in any exception
and they are killed. On the other side has effect on debugging.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Configuring DEBUG_SLAB causes a noMMU kernel to die during initialization
with an invalid virtual address panic in kfree_debugcheck().
The panic is due to an improper definition of pfn_valid().
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This patch add support for dynamic function graph tracer.
There is one my expactation that I can do flush_icache after
all code modification. On microblaze is this safer than do
flush for every entry. For icache is used name flush but
correct should be invalidation - this will be fix in upcomming
new cache implementaion and WB support.
Signed-off-by: Michal Simek <monstr@monstr.eu>
With dynamic function tracer, by default, _mcount is defined as an
"empty" function, it returns directly without any more action. When
enabling it in user-space, it will jump to a real tracing
function(ftrace_caller), and do the real job for us.
Differ from the static function tracer, dynamic function tracer provides
two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the
tracing of some indicated kernel functions(set_ftrace_filter).
In the kernel version, there is only one "_mcount" string for every
kernel function, so, we just need to match this one in mcount_regex of
scripts/recordmcount.pl.
For more information please look at code and Documentation/trace folder.
Steven ACK that scripts/recordmcount.pl part.
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Michal Simek <monstr@monstr.eu>
If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
_mcount will be inserted into each kernel function. so, there is a
possibility to trace the kernel functions in _mcount.
This patch add the specific _mcount support for static function
tracing. by default, ftrace_trace_function is initialized as
ftrace_stub(an empty function), so, the default _mcount will introduce
very little overhead. after enabling ftrace in user-space, it will jump
to a real tracing function and do static function tracing for us.
Commit message from Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
There are just two major changes
Renamed local_irq functions to raw_local_irq in irq.c.
Added TRACE_IRQFLAGS_SUPPORT to Kconfig.debug.
Look at Documentation/irqflags-tracing.txt
Signed-off-by: Michal Simek <monstr@monstr.eu>
Microblaze needs to do lock_init very soon because MMU init calls lock functions.
Here is the explanation from Peter Zijlstra why we have to enable
__ARCH_WANTS_INTERRUPTS_ON_CTSW.
"So we schedule while holding rq->lock (for obvious reasons), but since
lockdep tracks held locks per tasks, we need to transfer the held state
from the prev to the next task. We do this by explicity calling
spin_release(&rq->lock) in context_switch() right before switch_to(),
and calling spin_acquire(&rq->lock) in
finish_task_switch()->finish_lock_switch().
Now, for some reason lockdep thinks that interrupts got enabled over the
context switch (git grep __ARCH_WANTS_INTERRUPTS_ON_CTSW arch/microblaze
doesn't seem to turn up anything).
Clearly trying to acquire the rq->lock with interrupts enabled is a bad
idea and lockdep warns you about this."
Signed-off-by: Michal Simek <monstr@monstr.eu>
This is working implemetation but the problem is that
Microblaze misses frame pointer that's why is there
big loop which trace and show all addresses which are in text.
It shows addresses which are in registers, etc.
This is problem and this is the reason why all Microblaze
traces are wrong. There is an option to do hacks and trace
the kernel code but this is too complicated.
Signed-off-by: Michal Simek <monstr@monstr.eu>
The problem was that free_initmem pass to free_initrd_mem got
bad aligned __init_begin symbol and free_initrd_mem don't care
about __init_end but take PAGE_SIZE instead.
Here is behavior in kernel bootlog.
ramdisk_execute_command from (init/main.c) was rewrite
Freeing unused kernel memory: 6224k freed
Failed to execute ��������������{���
Failed to execute ��������������{����. Attempting defaults...
Mounting proc:
Mounting var:
Signed-off-by: Michal Simek <monstr@monstr.eu>
* 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6:
IXP4xx: GTWX5715 platform only has two PCI IRQ lines, not four.
IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.
IXP4xx: move Gemtek GTWX5715 platform macros to the platform code.
IXP4xx: Remove unused Motorola PrPMC1100 platform macros.
IXP4xx: move FSG platform macros to the platform code.
IXP4xx: move DSM G600 platform macros to the platform code.
IXP4xx: move NAS100D platform macros to the platform code.
IXP4xx: move NSLU2 platform macros to the platform code.
IXP4xx: move Coyote platform macros to the platform code.
IXP4xx: move AVILA platform macros to the platform code.
IXP4xx: move IXDP425 platform macros to the platform code.
IXP4xx: Extend PCI MMIO indirect address space to 1 GB.
IXP4xx: Fix compilation failure with CONFIG_IXP4XX_INDIRECT_PCI.
IXP4xx: Drop "__ixp4xx_" prefix from in/out/ioread/iowrite functions for clarity.
IXP4xx: Rename indirect MMIO primitives from __ixp4xx_* to __indirect_*.
IXP4xx: Ensure index is positive in irq_to_gpio() and npe_request().
ARM: fix insl() and outsl() endianness on IXP4xx architecture.
IXP4xx: Fix normally-disabled debugging text in drivers/net/arm/ixp4xx_eth.c.
IXP4xx: change the timer base frequency to 66.666000 MHz.
As shown by the previous patch (6698e3472: "tty: Fix BKL taken under a
spinlock bug introduced in the BKL split") the BKL removal is prone to
some subtle issues, where removing the BKL in one place may in fact make
a previously nested BKL call the new outer call, and then prone to nasty
deadlocks with other spinlocks.
In general, we should never take the BKL while we're holding a spinlock,
so let's just add a "might_sleep()" to it (even though the BKL doesn't
technically sleep - at least not yet), and we'll get nice warnings the
next time this kind of problem happens during BKL removal.
Acked-and-Tested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The fasync path takes the BKL (it probably doesn't need to in fact)
while holding the file_list spinlock. You can't do that with the kernel
lock: it causes lock inversions and deadlocks.
Leave the BKL over that bit for the moment.
Identified by AKPM.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Acked-and-Tested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (151 commits)
powerpc: Fix usage of 64-bit instruction in 32-bit altivec code
MAINTAINERS: Add PowerPC patterns
powerpc/pseries: Track previous CPPR values to correctly EOI interrupts
powerpc/pseries: Correct pseries/dlpar.c build break without CONFIG_SMP
powerpc: Make "intspec" pointers in irq_host->xlate() const
powerpc/8xx: DTLB Miss cleanup
powerpc/8xx: Remove DIRTY pte handling in DTLB Error.
powerpc/8xx: Start using dcbX instructions in various copy routines
powerpc/8xx: Restore _PAGE_WRITETHRU
powerpc/8xx: Add missing Guarded setting in DTLB Error.
powerpc/8xx: Fixup DAR from buggy dcbX instructions.
powerpc/8xx: Tag DAR with 0x00f0 to catch buggy instructions.
powerpc/8xx: Update TLB asm so it behaves as linux mm expects.
powerpc/8xx: Invalidate non present TLBs
powerpc/pseries: Serialize cpu hotplug operations during deactivate Vs deallocate
pseries/pseries: Add code to online/offline CPUs of a DLPAR node
powerpc: stop_this_cpu: remove the cpu from the online map.
powerpc/pseries: Add kernel based CPU DLPAR handling
sysfs/cpu: Add probe/release files
powerpc/pseries: Kernel DLPAR Infrastructure
...
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
ALSA: hda - Overwrite pin config on intel DG45ID board.
intelhdmi - dont power off HDA link
ALSA: hrtimer - Fix lock-up
ALSA: intelhdmi - add channel mapping for typical configurations
ALSA: intelhdmi - channel mapping applies to Pin
ALSA: intelhdmi - accept DisplayPort pin
ALSA: hda - show HBR(High Bit Rate) pin cap in procfs
ALSA: hda - Fix LED GPIO setup for HP laptops with IDT codecs
ASoC: Fix build of OMAP sound drivers
ALSA: opti93x: fix irq releasing if the irq cannot be allocated
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (75 commits)
omap3: Fix OMAP35XX_REV macros
omap: serial: fix non-empty uart fifo read abort
omap3: Zoom2/3: Update hsmmc board config params
omap3 : Enable TWL4030 Keypad for Zoom2 and Zoom3 boards
omap3: id code detection 3525 vs 3515
omap3: rx51: Use wl1251 in SPI mode 3
omap3: zoom2/3: make MMC slot work again
omap1: htcherald: Update defconfig to include mux support
omap1: LCD_DMA: Use some define rather than a hexadecimal
omap: header: remove unused data-type
omap: arch/arm/plat-omap/devices.c - sort alphabetically
omap: Correcting GPMC_CONFIG1_DEVICETYPE_NAND
OMAP3: serial - allow platforms specify which UARTs to initialize
omap3: cm-t35: add mux initialization
OMAP4: Sync up omap4430 defconfig
OMAP4: Remove the secondary wait loop
OMAP4: AuxCoreBoot registers only accessible in secure mode
OMAP4: Fix SRAM base and size
OMAP4: Fix cpu detection
omap3: pandora: board file updates for .33
...
