MIPS: Octeon: False positive timeout

If we reach the test just below the loop with a `timeout' value of 0,
this does not mean that the timeout caused the loop to end, but rather
the `smi_rd.s.pending', in the last iteration. If timeout caused the
loop to end, then `timeout' is -1, not 0.

Since this can occur only in the last iteration, it is not very likely
to be a problem. By changing the post- to prefix decrement we ensure
that a timeout of 0 does mean it timed out.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Roel Kluin 2009-08-26 14:48:35 +02:00 committed by Ralf Baechle
parent e3bf887d73
commit fff9c81529

View File

@ -421,7 +421,7 @@ static inline int cvmx_mdio_45_read(int bus_id, int phy_id, int device,
do {
cvmx_wait(1000);
smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(bus_id));
} while (smi_rd.s.pending && timeout--);
} while (smi_rd.s.pending && --timeout);
if (timeout <= 0) {
cvmx_dprintf("cvmx_mdio_45_read: bus_id %d phy_id %2d "