Merge "trace: Add new trace event for DCVSH"
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qctecmdr
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@ -5,28 +5,42 @@
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#include <linux/cpufreq.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/pm_opp.h>
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#include <linux/energy_model.h>
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#include <linux/sched.h>
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#include <linux/cpu_cooling.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/dcvsh.h>
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#define LUT_MAX_ENTRIES 40U
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#define CORE_COUNT_VAL(val) (((val) & (GENMASK(18, 16))) >> 16)
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#define LUT_ROW_SIZE 32
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#define CLK_HW_DIV 2
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#define EQ_IRQ_STATUS BIT(0)
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#define LT_IRQ_STATUS BIT(1)
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#define MAX_FN_SIZE 12
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#define LIMITS_POLLING_DELAY_MS 10
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#define CYCLE_CNTR_OFFSET(c, m, acc_count) \
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(acc_count ? ((c - cpumask_first(m) + 1) * 4) : 0)
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enum {
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REG_ENABLE,
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REG_FREQ_LUT_TABLE,
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REG_VOLT_LUT_TABLE,
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REG_PERF_STATE,
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REG_CYCLE_CNTR,
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REG_LLM_DCVS_VC_VOTE,
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REG_INTR_EN,
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REG_INTR_CLR,
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REG_INTR_STATUS,
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REG_ARRAY_SIZE,
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};
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@ -41,6 +55,11 @@ struct cpufreq_qcom {
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unsigned int max_cores;
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unsigned long xo_rate;
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unsigned long cpu_hw_rate;
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struct delayed_work freq_poll_work;
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struct mutex dcvsh_lock;
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int dcvsh_irq;
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char dcvsh_irq_name[MAX_FN_SIZE];
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bool is_irq_enabled;
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};
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struct cpufreq_counter {
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@ -63,11 +82,92 @@ static const u16 cpufreq_qcom_epss_std_offsets[REG_ARRAY_SIZE] = {
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[REG_VOLT_LUT_TABLE] = 0x200,
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[REG_PERF_STATE] = 0x320,
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[REG_CYCLE_CNTR] = 0x3c4,
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[REG_LLM_DCVS_VC_VOTE] = 0x024,
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[REG_INTR_EN] = 0x304,
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[REG_INTR_CLR] = 0x308,
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[REG_INTR_STATUS] = 0x30C,
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};
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static struct cpufreq_counter qcom_cpufreq_counter[NR_CPUS];
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static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS];
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static unsigned long limits_mitigation_notify(struct cpufreq_qcom *c)
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{
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int i;
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u32 max_vc;
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max_vc = readl_relaxed(c->reg_bases[REG_LLM_DCVS_VC_VOTE]) &
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GENMASK(13, 8);
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for (i = 0; i < LUT_MAX_ENTRIES; i++) {
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if (c->table[i].driver_data != max_vc)
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continue;
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else {
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sched_update_cpu_freq_min_max(&c->related_cpus, 0,
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c->table[i].frequency);
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trace_dcvsh_freq(cpumask_first(&c->related_cpus),
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c->table[i].frequency);
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return c->table[i].frequency;
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}
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}
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return 0;
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}
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static void limits_dcvsh_poll(struct work_struct *work)
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{
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struct cpufreq_qcom *c = container_of(work, struct cpufreq_qcom,
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freq_poll_work.work);
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struct cpufreq_policy *policy;
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unsigned long freq_limit;
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u32 regval, cpu;
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mutex_lock(&c->dcvsh_lock);
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cpu = cpumask_first(&c->related_cpus);
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policy = cpufreq_cpu_get_raw(cpu);
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freq_limit = limits_mitigation_notify(c);
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if (freq_limit != policy->cpuinfo.max_freq || !freq_limit) {
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mod_delayed_work(system_highpri_wq, &c->freq_poll_work,
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msecs_to_jiffies(LIMITS_POLLING_DELAY_MS));
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} else {
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regval = readl_relaxed(c->reg_bases[REG_INTR_CLR]);
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regval &= ~LT_IRQ_STATUS;
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writel_relaxed(regval, c->reg_bases[REG_INTR_CLR]);
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c->is_irq_enabled = true;
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enable_irq(c->dcvsh_irq);
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}
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mutex_unlock(&c->dcvsh_lock);
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}
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static irqreturn_t dcvsh_handle_isr(int irq, void *data)
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{
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struct cpufreq_qcom *c = data;
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u32 regval;
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regval = readl_relaxed(c->reg_bases[REG_INTR_STATUS]);
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if (!(regval & LT_IRQ_STATUS))
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return IRQ_HANDLED;
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mutex_lock(&c->dcvsh_lock);
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if (c->is_irq_enabled) {
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c->is_irq_enabled = false;
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disable_irq_nosync(c->dcvsh_irq);
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limits_mitigation_notify(c);
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mod_delayed_work(system_highpri_wq, &c->freq_poll_work,
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msecs_to_jiffies(LIMITS_POLLING_DELAY_MS));
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}
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mutex_unlock(&c->dcvsh_lock);
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return IRQ_HANDLED;
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}
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static u64 qcom_cpufreq_get_cpu_cycle_counter(int cpu)
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{
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struct cpufreq_counter *cpu_counter;
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@ -183,6 +283,21 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
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em_register_perf_domain(policy->cpus, ret, &em_cb);
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if (c->dcvsh_irq > 0) {
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snprintf(c->dcvsh_irq_name, sizeof(c->dcvsh_irq_name),
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"dcvsh-irq-%d", policy->cpu);
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ret = devm_request_threaded_irq(cpu_dev, c->dcvsh_irq, NULL,
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dcvsh_handle_isr, IRQF_TRIGGER_HIGH | IRQF_ONESHOT |
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IRQF_NO_SUSPEND | IRQF_SHARED, c->dcvsh_irq_name, c);
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if (ret) {
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dev_err(cpu_dev, "Failed to register irq %d\n", ret);
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return ret;
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}
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c->is_irq_enabled = true;
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writel_relaxed(LT_IRQ_STATUS, c->reg_bases[REG_INTR_EN]);
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}
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return 0;
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}
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@ -241,6 +356,7 @@ static int qcom_cpufreq_hw_read_lut(struct platform_device *pdev,
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struct device *dev = &pdev->dev;
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void __iomem *base_freq, *base_volt;
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u32 data, src, lval, i, core_count, prev_cc, prev_freq, cur_freq, volt;
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u32 vc;
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unsigned long cpu;
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c->table = devm_kcalloc(dev, LUT_MAX_ENTRIES + 1,
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@ -259,12 +375,14 @@ static int qcom_cpufreq_hw_read_lut(struct platform_device *pdev,
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data = readl_relaxed(base_volt + i * lut_row_size);
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volt = (data & GENMASK(11, 0)) * 1000;
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vc = data & GENMASK(21, 16);
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if (src)
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c->table[i].frequency = c->xo_rate * lval / 1000;
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else
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c->table[i].frequency = c->cpu_hw_rate / 1000;
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c->table[i].driver_data = vc;
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cur_freq = c->table[i].frequency;
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dev_dbg(dev, "index=%d freq=%d, core_count %d\n",
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@ -385,6 +503,15 @@ static int qcom_cpu_resources_init(struct platform_device *pdev,
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return ret;
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}
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if (of_find_property(dev->of_node, "interrupts", NULL)) {
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c->dcvsh_irq = of_irq_get(dev->of_node, index);
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if (c->dcvsh_irq > 0) {
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mutex_init(&c->dcvsh_lock);
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INIT_DEFERRABLE_WORK(&c->freq_poll_work,
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limits_dcvsh_poll);
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}
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}
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for_each_cpu(cpu_r, &c->related_cpus)
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qcom_freq_domain_map[cpu_r] = c;
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35
include/trace/events/dcvsh.h
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35
include/trace/events/dcvsh.h
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@ -0,0 +1,35 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM dcvsh
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#if !defined(_TRACE_DCVSH_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_DCVSH_H
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#include <linux/tracepoint.h>
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TRACE_EVENT(dcvsh_freq,
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TP_PROTO(unsigned long cpu, unsigned long freq),
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TP_ARGS(cpu, freq),
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TP_STRUCT__entry(
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__field(unsigned long, cpu)
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__field(unsigned long, freq)
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),
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TP_fast_assign(
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__entry->cpu = cpu;
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__entry->freq = freq;
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),
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TP_printk("cpu:%lu max frequency:%lu", __entry->cpu, __entry->freq)
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);
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#endif /* _TRACE_DCVSH_H */
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/* This part must be outside protection */
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#include <trace/define_trace.h>
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