dt-bindings: clock: Add mdss-28nm-pll-clk for legacy targets

Create new header copied from mdss-28nm-pll-clk.h and rename
enums for legacy targets.

Change-Id: I5426369d05346fdf13021b21e239ffe0d43c4436
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>
This commit is contained in:
Nirmal Abraham 2021-03-16 16:27:27 +05:30
parent a5eb56f58a
commit d10df360ea

View File

@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2016-2019, 2021 The Linux Foundation. All rights reserved.
*/
#ifndef __MDSS_28NM_PLL_CLK_LEGACY_H
#define __MDSS_28NM_PLL_CLK_LEGACY_H
/* DSI PLL clocks */
#define VCOCLK_0 0
#define ANALOG_POSTDIV_0_CLK 1
#define INDIRECT_PATH_SRC_0_CLK 2
#define BYTECLK_SRC_MUX_0_CLK 3
#define BYTECLK_SRC_0_CLK 4
#define PCLK_SRC_0_CLK 5
#define VCOCLK_1 6
#define ANALOG_POSTDIV_1_CLK 7
#define INDIRECT_PATH_SRC_1_CLK 8
#define BYTECLK_SRC_MUX_1_CLK 9
#define BYTECLK_SRC_1_CLK 10
#define PCLK_SRC_1_CLK 11
/* HDMI PLL clocks */
#define HDMI_VCO_CLK 0
#define HDMI_VCO_DIVIDED_1_CLK_SRC 1
#define HDMI_VCO_DIVIDED_TWO_CLK_SRC 2
#define HDMI_VCO_DIVIDED_FOUR_CLK_SRC 3
#define HDMI_VCO_DIVIDED_SIX_CLK_SRC 4
#define HDMI_PCLK_SRC_MUX 5
#define HDMI_PCLK_SRC 6
#endif