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ASoC: pcm186x: Fix device reset-registers trigger value

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commit 5277715639ff6f75c729e657690751a831112c4b upstream.

According to the current device datasheet (TI Lit # SLAS831D, revised
March 2018) the value written to the device's PAGE register to trigger
a complete register reset should be 0xfe, not 0xff. So go ahead and
update to the correct value.

Reported-by: Stephane Le Provost <stephane.leprovost@mediatek.com>
Tested-by: Stephane Le Provost <stephane.leprovost@mediatek.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Andreas Dannenberg 2018-11-15 11:01:31 -06:00 committed by Greg Kroah-Hartman
parent f35f68c68c
commit b16c2b78f1
1 changed files with 1 additions and 1 deletions
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2
sound/soc/codecs/pcm186x.h
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@ -139,7 +139,7 @@ enum pcm186x_type {
#define PCM186X_MAX_REGISTER PCM186X_CURR_TRIM_CTRL #define PCM186X_MAX_REGISTER PCM186X_CURR_TRIM_CTRL
/* PCM186X_PAGE */ /* PCM186X_PAGE */
#define PCM186X_RESET 0xff #define PCM186X_RESET 0xfe
/* PCM186X_ADCX_INPUT_SEL_X */ /* PCM186X_ADCX_INPUT_SEL_X */
#define PCM186X_ADC_INPUT_SEL_POL BIT(7) #define PCM186X_ADC_INPUT_SEL_POL BIT(7)