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dt-bindings: clock: Add clock ID for HWKM & PKA clock for Scuba

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HWKM & PKA clocks are required to be voted from the clients,
so add the relevant clock ids for the same.

Change-Id: If61293217dc2fc331603c0d0d0e1613016a9c3ac
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
This commit is contained in:
Naveen Yadav 2020-04-08 18:51:40 +05:30
parent dd596a6d49
commit a3a959129f
1 changed files with 87 additions and 83 deletions
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170
include/dt-bindings/clock/qcom,rpmcc.h
View File

@ -127,88 +127,92 @@
#define RPM_SMD_QPIC_A_CLK 75
#define RPM_SMD_CE1_CLK 76
#define RPM_SMD_CE1_A_CLK 77
#define RPM_SMD_BIMC_GPU_CLK 78
#define RPM_SMD_BIMC_GPU_A_CLK 79
#define RPM_SMD_LN_BB_CLK 80
#define RPM_SMD_LN_BB_CLK_A 81
#define RPM_SMD_LN_BB_CLK_PIN 82
#define RPM_SMD_LN_BB_CLK_A_PIN 83
#define RPM_SMD_RF_CLK3 84
#define RPM_SMD_RF_CLK3_A 85
#define RPM_SMD_RF_CLK3_PIN 86
#define RPM_SMD_RF_CLK3_A_PIN 87
#define RPM_SMD_LN_BB_CLK1 88
#define RPM_SMD_LN_BB_CLK1_A 89
#define RPM_SMD_LN_BB_CLK2 90
#define RPM_SMD_LN_BB_CLK2_A 91
#define RPM_SMD_LN_BB_CLK3 92
#define RPM_SMD_LN_BB_CLK3_A 93
#define RPM_SMD_MMAXI_CLK 94
#define RPM_SMD_MMAXI_A_CLK 95
#define RPM_SMD_AGGR1_NOC_CLK 96
#define RPM_SMD_AGGR1_NOC_A_CLK 97
#define RPM_SMD_AGGR2_NOC_CLK 98
#define RPM_SMD_AGGR2_NOC_A_CLK 99
#define PNOC_MSMBUS_CLK 100
#define PNOC_MSMBUS_A_CLK 101
#define PNOC_KEEPALIVE_A_CLK 102
#define SNOC_MSMBUS_CLK 103
#define SNOC_MSMBUS_A_CLK 104
#define BIMC_MSMBUS_CLK 105
#define BIMC_MSMBUS_A_CLK 106
#define PNOC_USB_CLK 107
#define PNOC_USB_A_CLK 108
#define SNOC_USB_CLK 109
#define SNOC_USB_A_CLK 110
#define BIMC_USB_CLK 111
#define BIMC_USB_A_CLK 112
#define SNOC_WCNSS_A_CLK 113
#define BIMC_WCNSS_A_CLK 114
#define MCD_CE1_CLK 115
#define QCEDEV_CE1_CLK 116
#define QCRYPTO_CE1_CLK 117
#define QSEECOM_CE1_CLK 118
#define SCM_CE1_CLK 119
#define CXO_SMD_OTG_CLK 120
#define CXO_SMD_LPM_CLK 121
#define CXO_SMD_PIL_PRONTO_CLK 122
#define CXO_SMD_PIL_MSS_CLK 123
#define CXO_SMD_WLAN_CLK 124
#define CXO_SMD_PIL_LPASS_CLK 125
#define CXO_SMD_PIL_CDSP_CLK 126
#define CNOC_MSMBUS_CLK 127
#define CNOC_MSMBUS_A_CLK 128
#define CNOC_KEEPALIVE_A_CLK 129
#define SNOC_KEEPALIVE_A_CLK 130
#define CPP_MMNRT_MSMBUS_CLK 131
#define CPP_MMNRT_MSMBUS_A_CLK 132
#define JPEG_MMNRT_MSMBUS_CLK 133
#define JPEG_MMNRT_MSMBUS_A_CLK 134
#define VENUS_MMNRT_MSMBUS_CLK 135
#define VENUS_MMNRT_MSMBUS_A_CLK 136
#define ARM9_MMNRT_MSMBUS_CLK 137
#define ARM9_MMNRT_MSMBUS_A_CLK 138
#define MDP_MMRT_MSMBUS_CLK 139
#define MDP_MMRT_MSMBUS_A_CLK 140
#define VFE_MMRT_MSMBUS_CLK 141
#define VFE_MMRT_MSMBUS_A_CLK 142
#define QUP0_MSMBUS_SNOC_PERIPH_CLK 143
#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK 144
#define QUP1_MSMBUS_SNOC_PERIPH_CLK 145
#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK 146
#define QUP2_MSMBUS_SNOC_PERIPH_CLK 147
#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK 148
#define DAP_MSMBUS_SNOC_PERIPH_CLK 149
#define DAP_MSMBUS_SNOC_PERIPH_A_CLK 150
#define SDC1_MSMBUS_SNOC_PERIPH_CLK 151
#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK 152
#define SDC2_MSMBUS_SNOC_PERIPH_CLK 153
#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK 154
#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK 155
#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK 156
#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK 157
#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK 158
#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK 159
#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK 160
#define RPM_SMD_HWKM_CLK 78
#define RPM_SMD_HWKM_A_CLK 79
#define RPM_SMD_PKA_CLK 80
#define RPM_SMD_PKA_A_CLK 81
#define RPM_SMD_BIMC_GPU_CLK 82
#define RPM_SMD_BIMC_GPU_A_CLK 83
#define RPM_SMD_LN_BB_CLK 84
#define RPM_SMD_LN_BB_CLK_A 85
#define RPM_SMD_LN_BB_CLK_PIN 86
#define RPM_SMD_LN_BB_CLK_A_PIN 87
#define RPM_SMD_RF_CLK3 88
#define RPM_SMD_RF_CLK3_A 89
#define RPM_SMD_RF_CLK3_PIN 90
#define RPM_SMD_RF_CLK3_A_PIN 91
#define RPM_SMD_LN_BB_CLK1 92
#define RPM_SMD_LN_BB_CLK1_A 93
#define RPM_SMD_LN_BB_CLK2 94
#define RPM_SMD_LN_BB_CLK2_A 95
#define RPM_SMD_LN_BB_CLK3 96
#define RPM_SMD_LN_BB_CLK3_A 97
#define RPM_SMD_MMAXI_CLK 98
#define RPM_SMD_MMAXI_A_CLK 99
#define RPM_SMD_AGGR1_NOC_CLK 100
#define RPM_SMD_AGGR1_NOC_A_CLK 101
#define RPM_SMD_AGGR2_NOC_CLK 102
#define RPM_SMD_AGGR2_NOC_A_CLK 103
#define PNOC_MSMBUS_CLK 104
#define PNOC_MSMBUS_A_CLK 105
#define PNOC_KEEPALIVE_A_CLK 106
#define SNOC_MSMBUS_CLK 107
#define SNOC_MSMBUS_A_CLK 108
#define BIMC_MSMBUS_CLK 109
#define BIMC_MSMBUS_A_CLK 110
#define PNOC_USB_CLK 111
#define PNOC_USB_A_CLK 112
#define SNOC_USB_CLK 113
#define SNOC_USB_A_CLK 114
#define BIMC_USB_CLK 115
#define BIMC_USB_A_CLK 116
#define SNOC_WCNSS_A_CLK 117
#define BIMC_WCNSS_A_CLK 118
#define MCD_CE1_CLK 119
#define QCEDEV_CE1_CLK 120
#define QCRYPTO_CE1_CLK 121
#define QSEECOM_CE1_CLK 122
#define SCM_CE1_CLK 123
#define CXO_SMD_OTG_CLK 124
#define CXO_SMD_LPM_CLK 125
#define CXO_SMD_PIL_PRONTO_CLK 126
#define CXO_SMD_PIL_MSS_CLK 127
#define CXO_SMD_WLAN_CLK 128
#define CXO_SMD_PIL_LPASS_CLK 129
#define CXO_SMD_PIL_CDSP_CLK 130
#define CNOC_MSMBUS_CLK 131
#define CNOC_MSMBUS_A_CLK 132
#define CNOC_KEEPALIVE_A_CLK 133
#define SNOC_KEEPALIVE_A_CLK 134
#define CPP_MMNRT_MSMBUS_CLK 135
#define CPP_MMNRT_MSMBUS_A_CLK 136
#define JPEG_MMNRT_MSMBUS_CLK 137
#define JPEG_MMNRT_MSMBUS_A_CLK 138
#define VENUS_MMNRT_MSMBUS_CLK 139
#define VENUS_MMNRT_MSMBUS_A_CLK 140
#define ARM9_MMNRT_MSMBUS_CLK 141
#define ARM9_MMNRT_MSMBUS_A_CLK 142
#define MDP_MMRT_MSMBUS_CLK 143
#define MDP_MMRT_MSMBUS_A_CLK 144
#define VFE_MMRT_MSMBUS_CLK 145
#define VFE_MMRT_MSMBUS_A_CLK 146
#define QUP0_MSMBUS_SNOC_PERIPH_CLK 147
#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK 148
#define QUP1_MSMBUS_SNOC_PERIPH_CLK 149
#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK 150
#define QUP2_MSMBUS_SNOC_PERIPH_CLK 151
#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK 152
#define DAP_MSMBUS_SNOC_PERIPH_CLK 153
#define DAP_MSMBUS_SNOC_PERIPH_A_CLK 154
#define SDC1_MSMBUS_SNOC_PERIPH_CLK 155
#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK 156
#define SDC2_MSMBUS_SNOC_PERIPH_CLK 157
#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK 158
#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK 159
#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK 160
#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK 161
#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK 162
#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK 163
#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK 164
#endif