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pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type()

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commit 04fb02757ae5188031eb71b2f6f189edb1caf5dc upstream.

As explained in the following commit a9a1a48336 ("pinctrl:
armada-37xx: Fix gpio interrupt setup") the armada_37xx_irq_set_type()
function can be called before the initialization of the mask field.

That means that we can't use this field in this function and need to
workaround it using hwirq.

Fixes: 30ac0d3b07 ("pinctrl: armada-37xx: Add edge both type gpio irq support")
Cc: stable@vger.kernel.org
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20191115155752.2562-1-gregory.clement@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Gregory CLEMENT 2019-11-15 16:57:52 +01:00 committed by Greg Kroah-Hartman
parent 24f4153491
commit 935057b020
1 changed files with 3 additions and 3 deletions
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6
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
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@ -592,10 +592,10 @@ static int armada_37xx_irq_set_type(struct irq_data *d, unsigned int type)
regmap_read(info->regmap, in_reg, &in_val);
/* Set initial polarity based on current input level. */
if (in_val & d->mask)
val |= d->mask; /* falling */
if (in_val & BIT(d->hwirq % GPIO_PER_REG))
val |= BIT(d->hwirq % GPIO_PER_REG); /* falling */
else
val &= ~d->mask; /* rising */
val &= ~(BIT(d->hwirq % GPIO_PER_REG)); /* rising */
break;
}
default: