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qos: Change cpus_affine to not be atomic

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There isn't a need for cpus_affine to be atomic, and reading/writing to
it outside of the global pm_qos lock is racy anyway. As such, we can
simply turn it into a primitive integer type.

Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com>
This commit is contained in:
Sultan Alsawaf 2021-10-17 23:50:38 -07:00 committed by spakkkk
parent 803faf2d23
commit 7efe3414b7
5 changed files with 14 additions and 13 deletions
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2
drivers/gpu/drm/drm_atomic.c
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@ -2726,7 +2726,7 @@ int drm_mode_atomic_ioctl(struct drm_device *dev, void *data,
*/
struct pm_qos_request req = {
.type = PM_QOS_REQ_AFFINE_CORES,
.cpus_affine = ATOMIC_INIT(BIT(raw_smp_processor_id()))
.cpus_affine = BIT(raw_smp_processor_id())
};
int ret;

2
drivers/gpu/msm/kgsl_ioctl.c
View File

@ -203,7 +203,7 @@ long kgsl_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
*/
struct pm_qos_request req = {
.type = PM_QOS_REQ_AFFINE_CORES,
.cpus_affine = ATOMIC_INIT(BIT(raw_smp_processor_id()))
.cpus_affine = BIT(raw_smp_processor_id())
};
long ret;

2
include/linux/pm_qos.h
View File

@ -54,8 +54,8 @@ enum pm_qos_req_type {
};
struct pm_qos_request {
unsigned long cpus_affine;
enum pm_qos_req_type type;
atomic_t cpus_affine;
#ifdef CONFIG_SMP
uint32_t irq;
/* Internal structure members */

19
kernel/power/qos.c
View File

@ -287,10 +287,10 @@ static inline int pm_qos_set_value_for_cpus(struct pm_qos_request *new_req,
if (new_cpus) {
/* cpus_affine changed, so the old CPUs need to be refreshed */
new_req_cpus = atomic_read(&new_req->cpus_affine) | new_cpus;
atomic_set(&new_req->cpus_affine, new_cpus);
new_req_cpus = new_req->cpus_affine | new_cpus;
new_req->cpus_affine = new_cpus;
} else {
new_req_cpus = atomic_read(&new_req->cpus_affine);
new_req_cpus = new_req->cpus_affine;
}
if (new_action != PM_QOS_REMOVE_REQ) {
@ -310,7 +310,7 @@ static inline int pm_qos_set_value_for_cpus(struct pm_qos_request *new_req,
plist_for_each_entry(req, &c->list, node) {
unsigned long affected_cpus;
affected_cpus = atomic_read(&req->cpus_affine) & new_req_cpus;
affected_cpus = req->cpus_affine & new_req_cpus;
if (!affected_cpus)
continue;
@ -601,7 +601,8 @@ void pm_qos_add_request(struct pm_qos_request *req,
switch (req->type) {
case PM_QOS_REQ_AFFINE_CORES:
if (!atomic_cmpxchg_relaxed(&req->cpus_affine, 0, CPUMASK_ALL)) {
if (!req->cpus_affine) {
req->cpus_affine = CPUMASK_ALL;
req->type = PM_QOS_REQ_ALL_CORES;
WARN(1, "Affine cores not set for request with affinity flag\n");
}
@ -618,14 +619,14 @@ void pm_qos_add_request(struct pm_qos_request *req,
mask = desc->irq_data.common->affinity;
/* Get the current affinity */
atomic_set(&req->cpus_affine, *cpumask_bits(mask));
req->cpus_affine = *cpumask_bits(mask);
req->irq_notify.irq = req->irq;
req->irq_notify.notify = pm_qos_irq_notify;
req->irq_notify.release = pm_qos_irq_release;
} else {
req->type = PM_QOS_REQ_ALL_CORES;
atomic_set(&req->cpus_affine, CPUMASK_ALL);
req->cpus_affine = CPUMASK_ALL;
WARN(1, "IRQ-%d not set for request with affinity flag\n",
req->irq);
}
@ -635,7 +636,7 @@ void pm_qos_add_request(struct pm_qos_request *req,
WARN(1, "Unknown request type %d\n", req->type);
/* fall through */
case PM_QOS_REQ_ALL_CORES:
atomic_set(&req->cpus_affine, CPUMASK_ALL);
req->cpus_affine = CPUMASK_ALL;
break;
}
@ -654,7 +655,7 @@ void pm_qos_add_request(struct pm_qos_request *req,
if (ret) {
WARN(1, "IRQ affinity notify set failed\n");
req->type = PM_QOS_REQ_ALL_CORES;
atomic_set(&req->cpus_affine, CPUMASK_ALL);
req->cpus_affine = CPUMASK_ALL;
pm_qos_update_target(
pm_qos_array[pm_qos_class]->constraints,
&req->node, PM_QOS_UPDATE_REQ, value);

2
techpack/audio/asoc/kona.c
View File

@ -5189,7 +5189,7 @@ static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
if (pm_qos_request_active(&substream->latency_pm_qos_req))
pm_qos_remove_request(&substream->latency_pm_qos_req);
atomic_set(&substream->latency_pm_qos_req.cpus_affine, BIT(1) | BIT(2));
substream->latency_pm_qos_req.cpus_affine = BIT(1) | BIT(2);
substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;