ARM: dts: rockchip: Remove @0 from the veyron memory node
commit 672e60b72bbe7aace88721db55b380b6a51fb8f9 upstream.
The Coreboot version on veyron ChromeOS devices seems to ignore
memory@0 nodes when updating the available memory and instead
inserts another memory node without the address.
This leads to 4GB systems only ever be using 2GB as the memory@0
node takes precedence. So remove the @0 for veyron devices.
Fixes: 0b639b815f
("ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards")
Cc: stable@vger.kernel.org
Reported-by: Heikki Lindholm <holin@iki.fi>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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6e74fc22db
@ -10,7 +10,11 @@
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#include "rk3288.dtsi"
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/ {
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memory@0 {
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/*
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* The default coreboot on veyron devices ignores memory@0 nodes
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* and would instead create another memory node.
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*/
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memory {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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