Merge tag 'LA.UM.9.12.r1-14800-SMxx50.QSSI13.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19 into android12-base
"LA.UM.9.12.r1-14800-SMxx50.QSSI13.0" * tag 'LA.UM.9.12.r1-14800-SMxx50.QSSI13.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19: qcom/l2cache_counters: Add support to check available CPUS FROMGIT: arm64: fix oops in concurrently setting insn_emulation sysctls media:uvc: supports dynamic setting of urb configuration msm: camera: Increase the total number of camera ID's supported cpu-topology: Don't error on more than CONFIG_NR_CPUS CPUs in device tree usb: gadget: rndis: prevent integer overflow in rndis_set_response() FROMLIST: binder: fix UAF of ref->proc caused by race condition msm_perf: check cpu_possible to improve stability msm: adsprpc: Validate the CID soc: qcom: socinfo: Add soc information for Khaje IOT power: qpnp-fg-gen4: Improve SDAM corruption check Change-Id: I541aeb4e4c8ae7c2e23e03e66bf3092886a4e48f Signed-off-by: UtsavBalar1231 <utsavbalar1231@gmail.com>
This commit is contained in:
commit
484fb07784
@ -31,6 +31,16 @@
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#include <asm/cputype.h>
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#include <asm/topology.h>
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/*
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* This function returns the logic cpu number of the node.
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* There are basically three kinds of return values:
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* (1) logic cpu number which is > 0.
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* (2) -ENODEV when the device tree(DT) node is valid and found in the DT but
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* there is no possible logical CPU in the kernel to match. This happens
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* when CONFIG_NR_CPUS is configure to be smaller than the number of
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* CPU nodes in DT. We need to just ignore this case.
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* (3) -1 if the node does not exist in the device tree
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*/
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static int __init get_cpu_for_node(struct device_node *node)
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{
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struct device_node *cpu_node;
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@ -44,8 +54,8 @@ static int __init get_cpu_for_node(struct device_node *node)
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if (cpu >= 0)
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topology_parse_cpu_capacity(cpu_node, cpu);
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else
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pr_crit("Unable to find CPU node for %pOF\n", cpu_node);
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pr_info("CPU node for %pOF exist but the possible cpu range is :%*pbl\n",
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cpu_node, cpumask_pr_args(cpu_possible_mask));
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of_node_put(cpu_node);
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return cpu;
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}
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@ -69,7 +79,7 @@ static int __init parse_core(struct device_node *core, int package_id,
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cpu_topology[cpu].package_id = package_id;
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cpu_topology[cpu].core_id = core_id;
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cpu_topology[cpu].thread_id = i;
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} else {
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} else if (cpu != -ENODEV) {
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pr_err("%pOF: Can't get CPU for thread\n",
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t);
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of_node_put(t);
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@ -90,7 +100,7 @@ static int __init parse_core(struct device_node *core, int package_id,
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cpu_topology[cpu].package_id = package_id;
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cpu_topology[cpu].core_id = core_id;
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} else if (leaf) {
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} else if (leaf && cpu != -ENODEV) {
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pr_err("%pOF: Can't get CPU for leaf core\n", core);
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return -EINVAL;
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}
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@ -1466,8 +1466,11 @@ static int context_alloc(struct fastrpc_file *fl, uint32_t kernel,
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spin_lock(&fl->hlock);
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hlist_add_head(&ctx->hn, &clst->pending);
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cid = (fl->cid >= ADSP_DOMAIN_ID && fl->cid < NUM_CHANNELS)
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? fl->cid : 0;
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if (!(fl->cid >= ADSP_DOMAIN_ID && fl->cid < NUM_CHANNELS)) {
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err = -ECHRNG;
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goto bail;
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}
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cid = fl->cid;
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chan = &me->channel[cid];
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spin_unlock(&fl->hlock);
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@ -2096,6 +2096,71 @@ struct uvc_device_info {
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u32 meta_format;
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};
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/* ------------------------------------------------------------------------
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* set urb queue size and urb packet size
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*
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*/
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static ssize_t store_urb_config(struct device *dev,
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struct device_attribute *attr, const char *buff, size_t count)
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{
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struct uvc_streaming *stream;
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struct usb_interface *intf = to_usb_interface(dev);
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struct uvc_device *udev = usb_get_intfdata(intf);
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long max_urb, max_urb_packets;
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int ret;
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char *arr, *tmp;
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arr = kstrdup(buff, GFP_KERNEL);
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if (!arr)
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return -ENOMEM;
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tmp = strsep(&arr, ":");
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if (!tmp)
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return -EINVAL;
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ret = kstrtol(tmp, 10, &max_urb);
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if (ret < 0)
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return ret;
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tmp = strsep(&arr, ":");
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if (!tmp)
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return -EINVAL;
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ret = kstrtol(tmp, 10, &max_urb_packets);
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if (ret < 0)
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return ret;
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if (max_urb <= 0 || max_urb > 128 ||
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max_urb_packets <= 0 || max_urb_packets > 128)
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return -EINVAL;
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list_for_each_entry(stream, &udev->streams, list) {
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if (stream->refcnt)
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continue;
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stream->max_urb = max_urb;
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stream->max_urb_packets = max_urb_packets;
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}
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return count;
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}
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static ssize_t show_urb_config(struct device *dev,
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struct device_attribute *attr, char *buff)
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{
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return 0;
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}
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static struct device_attribute urb_config_attr = {
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.attr = {
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.name = "urb_config",
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.mode = 00660,
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},
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.show = show_urb_config,
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.store = store_urb_config,
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};
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static int uvc_probe(struct usb_interface *intf,
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const struct usb_device_id *id)
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{
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@ -2228,6 +2293,12 @@ static int uvc_probe(struct usb_interface *intf,
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uvc_trace(UVC_TRACE_PROBE, "UVC device initialized.\n");
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usb_enable_autosuspend(udev);
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/* sysfs file for dynamically setting urb configs */
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ret = sysfs_create_file(&dev->intf->dev.kobj, &urb_config_attr.attr);
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if (ret != 0)
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pr_info("Unable to initialize urb configuration: %d\n", ret);
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return 0;
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error:
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|
@ -1547,7 +1547,7 @@ static void uvc_free_urb_buffers(struct uvc_streaming *stream)
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{
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unsigned int i;
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for (i = 0; i < UVC_URBS; ++i) {
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for (i = 0; i < stream->max_urb; ++i) {
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if (stream->urb_buffer[i]) {
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#ifndef CONFIG_DMA_NONCOHERENT
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usb_free_coherent(stream->dev->udev, stream->urb_size,
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@ -1587,12 +1587,22 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
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* payloads across multiple URBs.
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*/
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npackets = DIV_ROUND_UP(size, psize);
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if (npackets > UVC_MAX_PACKETS)
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npackets = UVC_MAX_PACKETS;
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if (npackets > stream->max_urb_packets)
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npackets = stream->max_urb_packets;
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/* Allocate memory for storing URB pointers */
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stream->urb = kcalloc(stream->max_urb,
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sizeof(struct urb *), gfp_flags | __GFP_NOWARN);
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stream->urb_buffer = kcalloc(stream->max_urb,
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sizeof(char *), gfp_flags | __GFP_NOWARN);
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stream->urb_dma = kcalloc(stream->max_urb,
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sizeof(dma_addr_t), gfp_flags | __GFP_NOWARN);
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/* Retry allocations until one succeed. */
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for (; npackets > 1; npackets /= 2) {
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for (i = 0; i < UVC_URBS; ++i) {
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for (i = 0; i < stream->max_urb; ++i) {
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stream->urb_size = psize * npackets;
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#ifndef CONFIG_DMA_NONCOHERENT
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stream->urb_buffer[i] = usb_alloc_coherent(
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@ -1608,10 +1618,10 @@ static int uvc_alloc_urb_buffers(struct uvc_streaming *stream,
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}
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}
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if (i == UVC_URBS) {
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uvc_trace(UVC_TRACE_VIDEO, "Allocated %u URB buffers "
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"of %ux%u bytes each.\n", UVC_URBS, npackets,
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psize);
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if (i == stream->max_urb) {
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uvc_trace(UVC_TRACE_VIDEO,
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"Allocated %u URB buffers of %ux%u bytes each.\n",
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stream->max_urb, npackets, psize);
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return npackets;
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}
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}
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@ -1631,7 +1641,7 @@ static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
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uvc_video_stats_stop(stream);
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for (i = 0; i < UVC_URBS; ++i) {
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for (i = 0; i < stream->max_urb; ++i) {
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urb = stream->urb[i];
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if (urb == NULL)
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continue;
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@ -1643,6 +1653,8 @@ static void uvc_uninit_video(struct uvc_streaming *stream, int free_buffers)
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if (free_buffers)
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uvc_free_urb_buffers(stream);
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stream->refcnt--;
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}
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/*
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@ -1692,7 +1704,7 @@ static int uvc_init_video_isoc(struct uvc_streaming *stream,
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size = npackets * psize;
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for (i = 0; i < UVC_URBS; ++i) {
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for (i = 0; i < stream->max_urb; ++i) {
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urb = usb_alloc_urb(npackets, gfp_flags);
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if (urb == NULL) {
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uvc_uninit_video(stream, 1);
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@ -1758,7 +1770,7 @@ static int uvc_init_video_bulk(struct uvc_streaming *stream,
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if (stream->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
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size = 0;
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for (i = 0; i < UVC_URBS; ++i) {
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for (i = 0; i < stream->max_urb; ++i) {
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urb = usb_alloc_urb(0, gfp_flags);
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if (urb == NULL) {
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uvc_uninit_video(stream, 1);
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@ -1867,7 +1879,8 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
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return ret;
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/* Submit the URBs. */
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for (i = 0; i < UVC_URBS; ++i) {
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stream->refcnt++;
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for (i = 0; i < stream->max_urb; ++i) {
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ret = usb_submit_urb(stream->urb[i], gfp_flags);
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if (ret < 0) {
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uvc_printk(KERN_ERR, "Failed to submit URB %u "
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@ -2028,6 +2041,9 @@ int uvc_video_init(struct uvc_streaming *stream)
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stream->cur_format = format;
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stream->cur_frame = frame;
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stream->max_urb = UVC_URBS;
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stream->max_urb_packets = UVC_MAX_PACKETS;
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/* Select the video decoding function */
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if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
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if (stream->dev->quirks & UVC_QUIRK_BUILTIN_ISIGHT)
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|
@ -535,9 +535,9 @@ struct uvc_streaming {
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u32 max_payload_size;
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} bulk;
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struct urb *urb[UVC_URBS];
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char *urb_buffer[UVC_URBS];
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dma_addr_t urb_dma[UVC_URBS];
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struct urb **urb;
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char **urb_buffer;
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dma_addr_t *urb_dma;
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unsigned int urb_size;
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u32 sequence;
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@ -570,6 +570,15 @@ struct uvc_streaming {
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spinlock_t lock;
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} clock;
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/* Maximum number of URBs that can be submitted */
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u32 max_urb;
|
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|
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/* Maximum number of packets per URB */
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u32 max_urb_packets;
|
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|
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/*set if stream in progress */
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u8 refcnt;
|
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};
|
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|
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struct uvc_device {
|
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|
@ -1037,8 +1037,8 @@ static int l2_cache_pmu_probe_cluster(struct device *parent,
|
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struct cluster_pmu *cluster;
|
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u32 fw_cluster_id;
|
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struct resource res;
|
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int ret;
|
||||
int irq;
|
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int ret = 0;
|
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int irq, cpu, cpu_count = 0;
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|
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cluster = kzalloc(sizeof(*cluster), GFP_KERNEL);
|
||||
if (!cluster) {
|
||||
@ -1064,6 +1064,14 @@ static int l2_cache_pmu_probe_cluster(struct device *parent,
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||||
goto err_put_dev;
|
||||
}
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
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if (topology_physical_package_id(cpu) == fw_cluster_id) {
|
||||
cpu_count++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (cpu_count == 0)
|
||||
goto err_put_dev;
|
||||
ret = of_address_to_resource(cn, 0, &res);
|
||||
if (ret) {
|
||||
pr_err(L2_COUNTERS_BUG "not able to find the resource\n");
|
||||
|
@ -1,6 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) "FG: %s: " fmt, __func__
|
||||
@ -30,12 +31,13 @@
|
||||
#define FG_MEM_IF_PM8150B 0x0D
|
||||
#define FG_ADC_RR_PM8150B 0x13
|
||||
|
||||
#define SDAM_COOKIE_OFFSET 0x80
|
||||
#define SDAM_CYCLE_COUNT_OFFSET 0x81
|
||||
#define SDAM_CAP_LEARN_OFFSET 0x91
|
||||
#define SDAM_COOKIE 0xA5
|
||||
#define SDAM_FG_PARAM_LENGTH 20
|
||||
|
||||
#define SDAM_COOKIE_OFFSET_4BYTE 0x95
|
||||
#define SDAM_COOKIE_4BYTE 0x12345678
|
||||
|
||||
#define FG_SRAM_LEN 972
|
||||
#define PROFILE_LEN 416
|
||||
#define PROFILE_COMP_LEN 24
|
||||
@ -1302,7 +1304,7 @@ static int fg_gen4_store_learned_capacity(void *data, int64_t learned_cap_uah)
|
||||
struct fg_dev *fg;
|
||||
int16_t cc_mah;
|
||||
int rc;
|
||||
u8 cookie = SDAM_COOKIE;
|
||||
u32 cookie_4byte = SDAM_COOKIE_4BYTE;
|
||||
|
||||
if (!chip)
|
||||
return -ENODEV;
|
||||
@ -1329,8 +1331,8 @@ static int fg_gen4_store_learned_capacity(void *data, int64_t learned_cap_uah)
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = nvmem_device_write(chip->fg_nvmem, SDAM_COOKIE_OFFSET, 1,
|
||||
&cookie);
|
||||
rc = nvmem_device_write(chip->fg_nvmem,
|
||||
SDAM_COOKIE_OFFSET_4BYTE, 1, &cookie_4byte);
|
||||
if (rc < 0) {
|
||||
pr_err("Error in writing cookie to SDAM, rc=%d\n", rc);
|
||||
return rc;
|
||||
@ -2377,17 +2379,17 @@ static bool is_sdam_cookie_set(struct fg_gen4_chip *chip)
|
||||
{
|
||||
struct fg_dev *fg = &chip->fg;
|
||||
int rc;
|
||||
u8 cookie;
|
||||
u32 cookie_4byte;
|
||||
|
||||
rc = nvmem_device_read(chip->fg_nvmem, SDAM_COOKIE_OFFSET, 1,
|
||||
&cookie);
|
||||
rc = nvmem_device_read(chip->fg_nvmem, SDAM_COOKIE_OFFSET_4BYTE, 4,
|
||||
&cookie_4byte);
|
||||
if (rc < 0) {
|
||||
pr_err("Error in reading SDAM_COOKIE rc=%d\n", rc);
|
||||
return false;
|
||||
}
|
||||
|
||||
fg_dbg(fg, FG_STATUS, "cookie: %x\n", cookie);
|
||||
return (cookie == SDAM_COOKIE);
|
||||
fg_dbg(fg, FG_STATUS, "cookie_4byte: %08x\n", cookie_4byte);
|
||||
return (cookie_4byte == SDAM_COOKIE_4BYTE);
|
||||
}
|
||||
|
||||
static void fg_gen4_clear_sdam(struct fg_gen4_chip *chip)
|
||||
@ -2411,8 +2413,9 @@ static void fg_gen4_clear_sdam(struct fg_gen4_chip *chip)
|
||||
static void fg_gen4_post_profile_load(struct fg_gen4_chip *chip)
|
||||
{
|
||||
struct fg_dev *fg = &chip->fg;
|
||||
int rc, act_cap_mah;
|
||||
int rc = 0, act_cap_mah;
|
||||
u8 buf[16] = {0};
|
||||
u32 cookie_4byte = 0;
|
||||
|
||||
if (chip->dt.multi_profile_load &&
|
||||
chip->batt_age_level != chip->last_batt_age_level) {
|
||||
@ -2466,6 +2469,13 @@ static void fg_gen4_post_profile_load(struct fg_gen4_chip *chip)
|
||||
pr_err("Error in writing learned capacity to SDAM, rc=%d\n",
|
||||
rc);
|
||||
}
|
||||
|
||||
/* Set the COOKIE to prevent rechecking the SRAM again */
|
||||
cookie_4byte = SDAM_COOKIE_4BYTE;
|
||||
rc = nvmem_device_write(chip->fg_nvmem,
|
||||
SDAM_COOKIE_OFFSET_4BYTE, 4, (u8 *)&cookie_4byte);
|
||||
if (rc < 0)
|
||||
pr_err("Failed to set SDAM cookie, rc=%d\n", rc);
|
||||
}
|
||||
|
||||
/* Restore the cycle counters so that it would be valid at this point */
|
||||
|
@ -76,13 +76,15 @@ static int set_cpu_min_freq(const char *buf, const struct kernel_param *kp)
|
||||
for (i = 0; i < ntokens; i += 2) {
|
||||
if (sscanf(cp, "%u:%u", &cpu, &val) != 2)
|
||||
return -EINVAL;
|
||||
if (cpu > (num_present_cpus() - 1))
|
||||
return -EINVAL;
|
||||
if (cpu >= nr_cpu_ids)
|
||||
break;
|
||||
|
||||
i_cpu_stats = &per_cpu(msm_perf_cpu_stats, cpu);
|
||||
if (cpu_possible(cpu)) {
|
||||
i_cpu_stats = &per_cpu(msm_perf_cpu_stats, cpu);
|
||||
|
||||
i_cpu_stats->min = val;
|
||||
cpumask_set_cpu(cpu, limit_mask);
|
||||
i_cpu_stats->min = val;
|
||||
cpumask_set_cpu(cpu, limit_mask);
|
||||
}
|
||||
|
||||
cp = strnchr(cp, strlen(cp), ' ');
|
||||
cp++;
|
||||
@ -153,14 +155,15 @@ static int set_cpu_max_freq(const char *buf, const struct kernel_param *kp)
|
||||
for (i = 0; i < ntokens; i += 2) {
|
||||
if (sscanf(cp, "%u:%u", &cpu, &val) != 2)
|
||||
return -EINVAL;
|
||||
if (cpu > (num_present_cpus() - 1))
|
||||
return -EINVAL;
|
||||
if (cpu >= nr_cpu_ids)
|
||||
break;
|
||||
|
||||
i_cpu_stats = &per_cpu(msm_perf_cpu_stats, cpu);
|
||||
|
||||
i_cpu_stats->max = val;
|
||||
cpumask_set_cpu(cpu, limit_mask);
|
||||
if (cpu_possible(cpu)) {
|
||||
i_cpu_stats = &per_cpu(msm_perf_cpu_stats, cpu);
|
||||
|
||||
i_cpu_stats->max = val;
|
||||
cpumask_set_cpu(cpu, limit_mask);
|
||||
}
|
||||
cp = strnchr(cp, strlen(cp), ' ');
|
||||
cp++;
|
||||
}
|
||||
|
@ -340,6 +340,7 @@ static struct msm_soc_info cpu_of_id[] = {
|
||||
|
||||
/* Khaje ID */
|
||||
[518] = {MSM_CPU_KHAJE, "KHAJE"},
|
||||
[586] = {MSM_CPU_KHAJE, "KHAJE"},
|
||||
|
||||
/* Khajep ID */
|
||||
[561] = {MSM_CPU_KHAJEP, "KHAJEP"},
|
||||
|
@ -62,6 +62,8 @@ enum msm_sensor_camera_id_t {
|
||||
CAMERA_1,
|
||||
CAMERA_2,
|
||||
CAMERA_3,
|
||||
CAMERA_4,
|
||||
CAMERA_5,
|
||||
MAX_CAMERAS,
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user