NFC: Add support for core init command
NFC driver currently have support for targtes with NQ4xx and later NFC HW. Targets having NQ3xx or older HW do not support NCI 2.0 specifications. Add support to probe device node on targets with NQ3xx or older NFC HW. Change-Id: I179a536cf68dea72f125f730d55fdb6d559fbe2c Signed-off-by: Bhuvan Varshney <bvarshne@codeaurora.org> Signed-off-by: Asha Magadi Venkateshamurthy <amagad@codeaurora.org>
This commit is contained in:
Asha Magadi Venkateshamurthy
parent
6b11034977
commit
020bfa88c1
@ -1050,17 +1050,145 @@ static const struct file_operations nfc_dev_fops = {
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#endif
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};
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/*
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* function: get_nfcc_hw_info()
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*
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* @client: pointer to i2c_client
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* @nqx_dev: pointer to nqx_dev structure
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* @nci_reset_rsp_payload_len: payload length of NCI reset cmd
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*
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* Retrieves NFCC HW information based on the type of NFC chip
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* used on the device. Depending on the nci_reset_rsp_payload_len
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* value, core INIT command will be sent.
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*
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* NFC HW NCI version Send Core INIT cmd
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* NQ3xx or old 1.0 Yes
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* NQ4xx 2.0 No
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* Sn1x0x 2.0 No
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*
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* Return: error codes in case of any failure,
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* number of bytes read otherwise
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*/
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static int get_nfcc_hw_info(struct i2c_client *client,
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struct nqx_dev *nqx_dev, char nci_reset_rsp_payload_len)
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{
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int ret = 0;
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char *nci_init_cmd = NULL;
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char *nci_init_rsp = NULL;
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char *nci_reset_ntf = NULL;
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char *nfcc_hw_info = NULL;
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unsigned char nfcc_hw_info_len = 0;
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nci_init_cmd = kzalloc(NCI_INIT_CMD_LEN + 1, GFP_DMA | GFP_KERNEL);
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if (!nci_init_cmd) {
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ret = -ENOMEM;
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goto err_nfcc_hw_info;
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}
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nci_init_rsp = kzalloc(NCI_INIT_RSP_LEN + 1, GFP_DMA | GFP_KERNEL);
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if (!nci_init_rsp) {
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ret = -ENOMEM;
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goto err_nfcc_hw_info;
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}
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nci_reset_ntf = kzalloc(NCI_RESET_NTF_LEN + 1, GFP_DMA | GFP_KERNEL);
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if (!nci_reset_ntf) {
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ret = -ENOMEM;
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goto err_nfcc_hw_info;
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}
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if (nci_reset_rsp_payload_len == NCI_1_0_RESET_RSP_PAYLOAD_LEN) {
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/*
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* Chipset is NQ330 or older.
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* Send core INIT command to get HW info.
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*/
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nci_init_cmd[0] = 0x20;
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nci_init_cmd[1] = 0x01;
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nci_init_cmd[2] = 0x00;
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ret = nqx_standby_write(nqx_dev, nci_init_cmd,
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NCI_INIT_CMD_LEN);
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if (ret < 0) {
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dev_dbg(&client->dev,
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"%s: - i2c_master_send failed for Core INIT\n",
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__func__);
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goto err_nfcc_hw_info;
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}
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ret = is_data_available_for_read(nqx_dev);
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if (ret <= 0) {
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nqx_disable_irq(nqx_dev);
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goto err_nfcc_hw_info;
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}
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/* Read Response of INIT command */
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ret = i2c_master_recv(client, nci_init_rsp, NCI_INIT_RSP_LEN);
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if (ret < 0) {
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dev_dbg(&client->dev,
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"%s: - i2c_master_recv get INIT rsp Error\n",
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__func__);
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goto err_nfcc_hw_info;
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}
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nfcc_hw_info = nci_init_rsp;
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} else {
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/*
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* Chipset is NQ4xx or later.
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* Retrieve NTF data from wait queue.
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*/
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ret = is_data_available_for_read(nqx_dev);
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if (ret <= 0) {
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nqx_disable_irq(nqx_dev);
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goto err_nfcc_hw_info;
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}
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/* Read Notification of RESET command */
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ret = i2c_master_recv(client, nci_reset_ntf, NCI_RESET_NTF_LEN);
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if (ret < 0) {
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dev_dbg(&client->dev,
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"%s: - i2c_master_recv get RESET ntf Error\n",
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__func__);
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goto err_nfcc_hw_info;
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}
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nfcc_hw_info = nci_reset_ntf;
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}
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/* Save NFCC HW info */
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nfcc_hw_info_len =
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NCI_HEADER_LEN + nfcc_hw_info[NCI_PAYLOAD_LENGTH_INDEX];
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if (nfcc_hw_info_len > PAYLOAD_HEADER_LENGTH) {
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nqx_dev->nqx_info.info.chip_type =
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nfcc_hw_info[nfcc_hw_info_len -
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NFCC_HW_CHIP_ID_OFFSET];
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nqx_dev->nqx_info.info.rom_version =
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nfcc_hw_info[nfcc_hw_info_len -
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NFCC_HW_ROM_VER_OFFSET];
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nqx_dev->nqx_info.info.fw_major =
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nfcc_hw_info[nfcc_hw_info_len -
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NFCC_HW_MAJOR_NO_OFFSET];
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nqx_dev->nqx_info.info.fw_minor =
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nfcc_hw_info[nfcc_hw_info_len -
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NFCC_HW_MINOR_NO_OFFSET];
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}
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err_nfcc_hw_info:
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kfree(nci_reset_ntf);
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kfree(nci_init_rsp);
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kfree(nci_init_cmd);
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return ret;
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}
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/* Check for availability of NQ_ NFC controller hardware */
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static int nfcc_hw_check(struct i2c_client *client, struct nqx_dev *nqx_dev)
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{
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int ret = 0;
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int gpio_retry_count = 0;
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unsigned char reset_ntf_len = 0;
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unsigned int enable_gpio = nqx_dev->en_gpio;
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char *nci_reset_cmd = NULL;
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char *nci_reset_rsp = NULL;
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char *nci_reset_ntf = NULL;
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char *nci_get_version_cmd = NULL;
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char *nci_get_version_rsp = NULL;
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@ -1075,13 +1203,6 @@ static int nfcc_hw_check(struct i2c_client *client, struct nqx_dev *nqx_dev)
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ret = -ENOMEM;
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goto done;
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}
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nci_reset_ntf = kzalloc(NCI_RESET_NTF_LEN + 1, GFP_DMA | GFP_KERNEL);
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if (!nci_reset_ntf) {
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ret = -ENOMEM;
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goto done;
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}
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nci_get_version_cmd = kzalloc(NCI_GET_VERSION_CMD_LEN + 1,
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GFP_DMA | GFP_KERNEL);
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if (!nci_get_version_cmd) {
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@ -1096,7 +1217,6 @@ static int nfcc_hw_check(struct i2c_client *client, struct nqx_dev *nqx_dev)
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goto done;
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}
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reset_enable_gpio:
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/* making sure that the NFCC starts in a clean state. */
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gpio_set_value(enable_gpio, 1);/* HPD : Enable*/
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/* hardware dependent delay */
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@ -1173,42 +1293,32 @@ reset_enable_gpio:
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goto err_nfcc_hw_check;
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}
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/* Read Response of RESET command */
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ret = i2c_master_recv(client, nci_reset_rsp, NCI_RESET_RSP_LEN);
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/* Read Header of RESET command */
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ret = i2c_master_recv(client, nci_reset_rsp, NCI_HEADER_LEN);
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if (ret != NCI_HEADER_LEN) {
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dev_dbg(&client->dev,
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"%s: - i2c_master_recv get RESET rsp header Error\n", __func__);
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goto err_nfcc_hw_check;
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}
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ret = i2c_master_recv(client, &nci_reset_rsp[NCI_PAYLOAD_START_INDEX],
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nci_reset_rsp[NCI_PAYLOAD_LENGTH_INDEX]);
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if (ret != nci_reset_rsp[NCI_PAYLOAD_LENGTH_INDEX]) {
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dev_dbg(&client->dev,
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"%s: - i2c_master_recv get RESET rsp data Error\n", __func__);
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goto err_nfcc_hw_check;
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}
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/* Retrieve NFCC HW info */
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ret = get_nfcc_hw_info(client, nqx_dev,
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nci_reset_rsp[NCI_PAYLOAD_LENGTH_INDEX]);
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if (ret < 0) {
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dev_err(&client->dev,
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"%s: - i2c_master_recv Error\n", __func__);
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gpio_retry_count = gpio_retry_count + 1;
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if (gpio_retry_count < MAX_RETRY_COUNT)
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goto reset_enable_gpio;
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dev_dbg(&client->dev,
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"%s: - Error in getting NFCC HW info\n", __func__);
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goto err_nfcc_hw_check;
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}
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ret = is_data_available_for_read(nqx_dev);
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if (ret <= 0) {
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nqx_disable_irq(nqx_dev);
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goto err_nfcc_hw_check;
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}
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/* Read Notification of RESET command */
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ret = i2c_master_recv(client, nci_reset_ntf, NCI_RESET_NTF_LEN);
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if (ret < 0) {
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dev_err(&client->dev,
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"%s: - i2c_master_recv Error\n", __func__);
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goto err_nfcc_hw_check;
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}
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reset_ntf_len = 2 + nci_reset_ntf[2]; /*payload + len*/
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if (reset_ntf_len > PAYLOAD_HEADER_LENGTH) {
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nqx_dev->nqx_info.info.chip_type =
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nci_reset_ntf[reset_ntf_len - 3];
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nqx_dev->nqx_info.info.rom_version =
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nci_reset_ntf[reset_ntf_len - 2];
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nqx_dev->nqx_info.info.fw_major =
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nci_reset_ntf[reset_ntf_len - 1];
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nqx_dev->nqx_info.info.fw_minor =
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nci_reset_ntf[reset_ntf_len];
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}
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dev_dbg(&client->dev,
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"%s: - nq - reset cmd answer : NfcNciRx %x %x %x\n",
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__func__, nci_reset_rsp[0],
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@ -1257,7 +1367,6 @@ err_nfcc_hw_check:
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done:
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kfree(nci_reset_rsp);
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kfree(nci_reset_ntf);
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kfree(nci_reset_cmd);
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kfree(nci_get_version_cmd);
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kfree(nci_get_version_rsp);
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@ -40,8 +40,17 @@
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#define NCI_RESET_CMD_LEN 4
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#define NCI_RESET_RSP_LEN 4
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#define NCI_RESET_NTF_LEN 13
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#define NCI_INIT_CMD_LEN 3
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#define NCI_INIT_RSP_LEN 28
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#define NCI_GET_VERSION_CMD_LEN 8
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#define NCI_GET_VERSION_RSP_LEN 12
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#define NCI_1_0_RESET_RSP_PAYLOAD_LEN 3
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#define NCI_PAYLOAD_START_INDEX 3
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#define NCI_PAYLOAD_LENGTH_INDEX (NCI_PAYLOAD_START_INDEX - 1)
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#define NFCC_HW_CHIP_ID_OFFSET 4
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#define NFCC_HW_ROM_VER_OFFSET 3
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#define NFCC_HW_MAJOR_NO_OFFSET 2
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#define NFCC_HW_MINOR_NO_OFFSET 1
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#define MAX_IRQ_WAIT_TIME (90) //in ms
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#define COLD_RESET_CMD_LEN 3
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#define COLD_RESET_RSP_LEN 4
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